IP Library › Granted Patent US 12,633,841
Granted Patent B2
US 12,633,841 · App. 18/180,258 · Granted May 19, 2026

Three-level inverter, control method, and system

Inventors: Fei Xu (Shanghai, CN); Xinyu Yu (Shanghai, CN); Kai Xin (Shanghai, CN); Xiaoxiang Zhou (Shanghai, CN); Lei Shi (Shanghai, CN); Peng Ju (Shanghai, CN)
Assignee: HUAWEI DIGITAL POWER TECHNOLOGIES CO., LTD.
H02M7/483H02M1/126H02M1/36
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Quick Facts
Patent No.
US 12,633,841
App. No.
18/180,258
Granted
May 19, 2026
Kind
B2
Abstract

A three-level inverter includes controllable switch components T 1 to T 6 . Each of the controllable switch components includes a parallel connected junction capacitor and an anti-parallel connected diode. A first terminal of T 1 is connected to a positive direct current bus, a second terminal of T 4 is connected to a negative direct current bus, a second terminal of T 1 is connected to first terminals of T 2 and T 5 . A controller is configured to: in a positive half cycle, control T 3 to be conducted after T 1 is conducted, and control T 3 to be disconnected before T 1 is conducted next time; and in a negative half cycle, control T 2 to be conducted after T 4 is conducted, and control T 2 to be disconnected before T 4 is conducted next time. The three-level inverter can balance voltages of the controllable switch components.

Claims (80)

1 . A three-level inverter, comprising:

a plurality of controllable switch components comprising a first switch component, a second switch component, a third switch component, a fourth switch component, a fifth switch component, and a sixth switch component, wherein each of the controllable switch components comprises a parallel connected junction capacitor and an anti-parallel connected diode, a first terminal of the first switch component is connected to a positive direct current bus, a second terminal of the fourth switch component is connected to a negative direct current bus, a second terminal of the first switch component is connected to a first terminals of the second switch component and a first terminal of the fifth switch component, a first terminal of the fourth switch component is connected to a second terminals of the third switch component and a second terminal of the sixth switch component, a second terminal of the second switch component and a first terminal of the third switch component are connected to a direct current bus midpoint, and a second terminal of the fifth switch component and a first terminal of the sixth switch component are connected together to form a bridge arm terminal; and further comprising a controller, wherein the controller controls working states of the controllable switch components by sending control signals; and

the controller is configured to:

in a positive half cycle, control the third switch component to be conducted after the first switch component is conducted, and control the third switch component to be disconnected before the first switch component is conducted next time; and

in a negative half cycle, control the second switch component to be conducted after the fourth switch component is conducted, and control the second switch component to be disconnected before the fourth switch component is conducted next time.

2 . The three-level inverter according to claim 1 , wherein the controller is further configured to:

in the positive half cycle, adjust a duty cycle and/or a phase of a control signal of the second switch component, and control the third switch component by using an adjusted control signal; and

in the negative half cycle, adjust a duty cycle and/or a phase of a control signal of the third switch component, and control the second switch component by using the adjusted control signal.

3 . The three-level inverter according to claim 1 , wherein

in the positive half cycle, a duty cycle of a control signal of the third switch component increases or decreases relative to a duty cycle of a control signal of the second switch component; and

in the negative half cycle, the duty cycle of the control signal of the second switch component increases or decreases relative to the duty cycle of the control signal of the third switch component.

4 . The three-level inverter according to claim 1 , wherein

in the positive half cycle, the control signal of the third switch component is phase-shifted relative to the control signal of the second switch component; and

in the negative half cycle, the control signal of the second switch component is phase-shifted relative to the control signal of the third switch component.

5 . The three-level inverter according to claim 1 , wherein the controller is further configured to:

in the positive half cycle, enable a rising edge of the control signal of the third switch component to delay relative to a rising edge of the control signal of the second switch component by a first preset time, and enable a falling edge of the control signal of the third switch component to advance relative to a falling edge of the control signal of the second switch component by a second preset time; and

in the negative half cycle, enable the rising edge of the control signal of the second switch component to delay relative to the rising edge of the control signal of the third switch component by the first preset time, and enable the falling edge of the control signal of the second switch component to advance relative to the falling edge of the control signal of the third switch component by the second preset time.

6 . The three-level inverter according to claim 1 , wherein the controller is further configured to:

in the positive half cycle, enable a rising edge of the control signal of the third switch component to delay relative to a rising edge of the control signal of the second switch component by a third preset time; and enable a falling edge of the control signal of the third switch component to delay relative to a falling edge of the control signal of the second switch component by a fourth preset time, and advance relative to a next rising edge of a control signal of the first switch component by a fifth preset time, wherein the fifth preset time is used to ensure that the third switch component is already disconnected when the first switch component is conducted next time; and

in the negative half cycle, enable the rising edge of the control signal of the second switch component to delay relative to the rising edge of the control signal of the third switch component by the third preset time; and enable the falling edge of the control signal of the second switch component to delay relative to the falling edge of the control signal of the third switch component by the fourth preset time, and advance relative to a next rising edge of the control signal of the fourth switch component by the fifth preset time, wherein the fifth preset time is used to ensure that the second switch component is already disconnected when the fourth switch component is conducted next time.

7 . The three-level inverter according to claim 1 , wherein the controller is further configured to:

in the positive half cycle, enable a rising edge of the control signal of the third switch component to delay relative to a rising edge of the control signal of the first switch component by a sixth preset time, and advance relative to a rising edge of the control signal of the second switch component by a seventh preset time, wherein the sixth preset time is used to ensure that the first switch component is already conducted when the third switch component is conducted; and enable a falling edge of the control signal of the third switch component to delay relative to a falling edge of the control signal of the second switch component by an eighth preset time, and advance relative to a next rising edge of the control signal of the first switch component by a ninth preset time, wherein the ninth preset time is used to ensure that the third switch component is already disconnected when the first switch component is conducted next time; and

in the negative half cycle, enable the rising edge of the control signal of the second switch component to delay relative to a rising edge of a control signal of the fourth switch component by the sixth preset time, and advance relative to the rising edge of the control signal of the third switch component by the seventh preset time, wherein the sixth preset time is used to ensure that the fourth switch component is already conducted when the second switch component is conducted; and enable the falling edge of the control signal of the second switch component to delay relative to the falling edge of the control signal of the third switch component by the eighth preset time, and advance relative to a next rising edge of the control signal of the fourth switch component by the ninth preset time, wherein the ninth preset time is used to ensure that the second switch component is already disconnected when the fourth switch component is conducted next time.

8 . The three-level inverter according to claim 1 , wherein the controller is further configured to:

in the positive half cycle, enable a rising edge of the control signal of the third switch component to delay relative to a rising edge of a control signal of the first switch component by a tenth preset time, and advance relative to a falling edge of the control signal of the first switch component by an eleventh preset time, wherein the tenth preset time is used to ensure that the first switch component is already conducted when the third switch component is conducted; and enable a falling edge of the control signal of the third switch component to advance relative to a falling edge of the control signal of the second switch component by a twelfth preset time; and

in the negative half cycle, enable a rising edge of the control signal of the second switch component to delay relative to a rising edge of a control signal of the fourth switch component by the tenth preset time, and advance relative to a falling edge of the control signal of the fourth switch component by the eleventh preset time, wherein the tenth preset time is used to ensure that the fourth switch component is already conducted when the second switch component is conducted; and enable the falling edge of the control signal of the second switch component to advance relative to the falling edge of the control signal of the third switch component by the twelfth preset time.

9 . The three-level inverter according to claim 1 , wherein the controller is further configured to:

in the positive half cycle, enable a rising edge of the control signal of the third switch component to delay relative to a rising edge of a control signal of the first switch component by a thirteenth preset time, and advance relative to a falling edge of the control signal of the first switch component by a fourteenth preset time, wherein the thirteenth preset time is used to ensure that the first switch component is already conducted when the third switch component is conducted; and enable a falling edge of the control signal of the third switch component to delay relative to a falling edge of the control signal of the second switch component by a fifteenth preset time, and advance relative to a next rising edge of the control signal of the first switch component by a sixteenth preset time, wherein the sixteenth preset time is used to ensure that the third switch component is already disconnected when the first switch component is conducted next time; and

in the negative half cycle, enable a rising edge of the control signal of the second switch component to delay relative to a rising edge of a control signal of the fourth switch component by the thirteenth preset time, and advance relative to a falling edge of the control signal of the fourth switch component by the fourteenth preset time, wherein the thirteenth preset time is used to ensure that the fourth switch component is already conducted when the second switch component is conducted; and enable the falling edge of the control signal of the second switch component to delay relative to the falling edge of the control signal of the third switch component by the fifteenth preset time, and advance relative to a next rising edge of the control signal of the fourth switch component by the sixteenth preset time, wherein the sixteenth preset time is used to ensure that the second switch component is already disconnected when the fourth switch component is conducted next time.

10 . A method for controlling a three-level inverter, wherein the three-level inverter comprises a plurality of controllable switch components comprising a first switch component, a second switch component, a third switch component, a fourth switch component, a fifth switch component, and a sixth switch component, wherein each of the controllable switch components comprises a parallel connected junction capacitor and an anti-parallel connected diode, a first terminal of the first switch component is connected to a positive direct current bus, a second terminal of the fourth switch component is connected to a negative direct current bus, a second terminal of the first switch component is connected to a first terminal of the second switch component and a first terminal of the fifth switch component, a first terminal of the fourth switch component is connected to a second terminals of the third switch component and a second terminal of the sixth switch component, a second terminal of the second switch component and a first terminal of the third switch component are connected to a direct current bus midpoint, and a second terminal of the fifth switch component and a first terminal of the sixth switch component are connected together to form a bridge arm terminal, and the method comprises:

in a positive half cycle, controlling the third switch component to be conducted after the first switch component is conducted, and controlling the third switch component to be disconnected before the first switch component is conducted next time; and

in a negative half cycle, controlling the second switch component to be conducted after the fourth switch component is conducted, and controlling the second switch component to be disconnected before the fourth switch component is conducted next time.

11 . The control method according to claim 10 , further comprising:

in the positive half cycle, adjusting a duty cycle and/or a phase of a control signal of the second switch component, and controlling the third switch component by using the adjusted control signal; and

in the negative half cycle, adjusting a duty cycle and/or a phase of a control signal of the third switch component, and controlling the second switch component by using the adjusted control signal.

12 . The control method according to claim 10 , wherein

in the positive half cycle, a duty cycle of a control signal of the third switch component increases or decreases relative to a duty cycle of a control signal of the second switch component; and

in the negative half cycle, the duty cycle of the control signal of the second switch component increases or decreases relative to the duty cycle of the control signal of the third switch component.

13 . The control method according to claim 10 , wherein

in the positive half cycle, the control signal of the third switch component is phase-shifted relative to the control signal of the second switch component; and

in the negative half cycle, the control signal of the second switch component is phase-shifted relative to the control signal of the third switch component.

14 . The control method according to claim 10 , wherein controlling the third switch component to be conducted after the first switch component is conducted, and controlling the third switch component to be disconnected before the first switch component is conducted next time, in the positive half cycle, further comprises:

enabling a rising edge of the control signal of the third switch component to delay relative to a rising edge of the control signal of the second switch component by a first preset time, and

enabling a falling edge of the control signal of the third switch component to advance relative to a falling edge of the control signal of the second switch component by a second preset time; and

controlling the second switch component to be conducted after the fourth switch component is conducted, and controlling the second switch component to be disconnected before the fourth switch component is conducted next time, in the negative half cycle, further comprises:

enabling the rising edge of the control signal of the second switch component to delay relative to the rising edge of the control signal of the third switch component by the first preset time, and

enabling the falling edge of the control signal of the second switch component to advance relative to the falling edge of the control signal of the third switch component by the second preset time.

15 . The control method according to claim 10 , wherein controlling the third switch component to be conducted after the first switch component is conducted, and controlling the third switch component to be disconnected before the first switch component is conducted next time, in the positive half cycle, further comprises:

enabling a rising edge of the control signal of the third switch component to delay relative to a rising edge of the control signal of the second switch component by a third preset time; and

enabling a falling edge of the control signal of the third switch component to delay relative to a falling edge of the control signal of the second switch component by a fourth preset time, and advance relative to a next rising edge of a control signal of the first switch component by a fifth preset time, wherein the fifth preset time is used to ensure that the third switch component is already disconnected when the first switch component is conducted next time; and

controlling the second switch component to be conducted after the fourth switch component is conducted, and controlling the second switch component to be disconnected before the fourth switch component is conducted next time, in the negative half cycle, further comprises:

enabling the rising edge of the control signal of the second switch component to delay relative to the rising edge of the control signal of the third switch component by the third preset time; and

enabling the falling edge of the control signal of the second switch component to delay relative to the falling edge of the control signal of the third switch component by the fourth preset time, and advance relative to a next rising edge of a control signal of the fourth switch component by the fifth preset time, wherein the fifth preset time is used to ensure that the second switch component is already disconnected when the fourth switch component is conducted next time.

16 . The control method according to claim 10 , wherein controlling the third switch component to be conducted after the first switch component is conducted, and controlling the third switch component to be disconnected before the first switch component is conducted next time, in the positive half cycle, further comprises:

enabling a rising edge of the control signal of the third switch component to delay relative to a rising edge of the control signal of the first switch component by a sixth preset time, and advance relative to a rising edge of the control signal of the second switch component by a seventh preset time, wherein the sixth preset time is used to ensure that the first switch component is already conducted when the third switch component is conducted; and

enabling a falling edge of the control signal of the third switch component to delay relative to a falling edge of the control signal of the second switch component by an eighth preset time, and advance relative to a next rising edge of the control signal of the first switch component by a ninth preset time, wherein the ninth preset time is used to ensure that the third switch component is already disconnected when the first switch component is conducted next time; and

controlling the second switch component to be conducted after the fourth switch component is conducted, and controlling the second switch component to be disconnected before the fourth switch component is conducted next time, in the negative half cycle, further comprises:

enabling the rising edge of the control signal of the second switch component to delay relative to a rising edge of a control signal of the fourth switch component by the sixth preset time, and advance relative to the rising edge of the control signal of the third switch component by the seventh preset time, wherein the sixth preset time is used to ensure that the fourth switch component is already conducted when the second switch component is conducted; and

enabling the falling edge of the control signal of the second switch component to delay relative to the falling edge of the control signal of the third switch component by the eighth preset time, and advance relative to a next rising edge of the control signal of the fourth switch component by the ninth preset time, wherein the ninth preset time is used to ensure that the second switch component is already disconnected when the fourth switch component is conducted next time.

17 . The control method according to claim 10 , wherein controlling the third switch component to be conducted after the first switch component is conducted, and controlling the third switch component to be disconnected before the first switch component is conducted next time, in the positive half cycle, further comprises:

enabling a rising edge of the control signal of the third switch component to delay relative to a rising edge of a control signal of the first switch component by a tenth preset time, and advance relative to a falling edge of the control signal of the first switch component by an eleventh preset time, wherein the tenth preset time is used to ensure that the first switch component is already conducted when the third switch component is conducted; and

enabling a falling edge of the control signal of the third switch component to advance relative to a falling edge of the control signal of the second switch component by a twelfth preset time; and

controlling the second switch component to be conducted after the fourth switch component is conducted, and controlling the second switch component to be disconnected before the fourth switch component is conducted next time, in the negative half cycle, further comprises:

enabling a rising edge of the control signal of the second switch component to delay relative to a rising edge of a control signal of the fourth switch component by the tenth preset time, and advance relative to a falling edge of the control signal of the fourth switch component by the eleventh preset time, wherein the tenth preset time is used to ensure that the fourth switch component is already conducted when the second switch component is conducted; and

enabling the falling edge of the control signal of the second switch component to advance relative to the falling edge of the control signal of the third switch component by the twelfth preset time.

18 . The control method according to claim 10 , wherein controlling the third switch component to be conducted after the first switch component is conducted, and controlling the third switch component to be disconnected before the first switch component is conducted next time, in the positive half cycle, further comprises:

enabling a rising edge of the control signal of the third switch component to delay relative to a rising edge of a control signal of the first switch component by a thirteenth preset time, and advance relative to a falling edge of the control signal of the first switch component by a fourteenth preset time, wherein the thirteenth preset time is used to ensure that the first switch component is already conducted when the third switch component is conducted; and

enabling a falling edge of the control signal of the third switch component to delay relative to a falling edge of the control signal of the second switch component by a fifteenth preset time, and advance relative to a next rising edge of the control signal of the first switch component by a sixteenth preset time, wherein the sixteenth preset time is used to ensure that the third switch component is already disconnected when the first switch component is conducted next time; and

controlling the second switch component to be conducted after the fourth switch component is conducted, and controlling the second switch component to be disconnected before the fourth switch component is conducted next time, in the negative half cycle, further comprises:

enabling a rising edge of the control signal of the second switch component to delay relative to a rising edge of a control signal of the fourth switch component by the thirteenth preset time, and advance relative to a falling edge of the control signal of the fourth switch component by the fourteenth preset time, wherein the thirteenth preset time is used to ensure that the fourth switch component is already conducted when the second switch component is conducted; and

enabling the falling edge of the control signal of the second switch component to delay relative to the falling edge of the control signal of the third switch component by the fifteenth preset time, and advance relative to a next rising edge of the control signal of the fourth switch component by the sixteenth preset time, wherein the sixteenth preset time is used to ensure that the second switch component is already disconnected when the fourth switch component is conducted next time.

19 . A photovoltaic power generation system, comprising a three-level inverter and a photovoltaic unit, wherein

the photovoltaic unit comprises a plurality of photovoltaic modules, and an output terminal of the photovoltaic unit is connected to an input terminal of the three-level inverter; and

the photovoltaic unit is configured to: convert light energy into a direct current and transmit the direct current to the three-level inverter comprising a plurality of controllable switch components comprising a first switch component, a second switch component, a third switch component, and a fourth switch component, wherein each of the controllable switch components comprises a parallel connected junction capacitor and an anti-parallel connected diode, a first terminal of the first switch component is connected to a positive direct current bus, a second terminal of the fourth switch component is connected to a negative direct current bus, a second terminal of the first switch component is connected to a first terminal of the second switch component, a first terminal of the fourth switch component is connected to second terminal of the third switch component, a second terminal of the second switch component and a first terminal of the third switch component are connected to a direct current bus midpoint; and further comprising a controller, wherein the controller controls working states of the controllable switch components by sending control signals; and

the controller is configured to:

in a positive half cycle, control the third switch component to be conducted after the first switch component is conducted, and control the third switch component to be disconnected before the first switch component is conducted next time; and

in a negative half cycle, control the second switch component to be conducted after the fourth switch component is conducted, and control the second switch component to be disconnected before the fourth switch component is conducted next time.

20 . The photovoltaic power generation system according to claim 19 , wherein the controller is further configured to:

in the positive half cycle, adjust a duty cycle and/or a phase of a control signal of the second switch component, and control the third switch component by using an adjusted control signal; and

in the negative half cycle, adjust a duty cycle and/or a phase of a control signal of the third switch component, and control the second switch component by using the adjusted control signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2026
From: XU, FEI; YU, XINYU; XIN, KAI; ZHOU, XIAOXIANG; SHI, LEI; JU, PENG
To: HUAWEI DIGITAL POWER TECHNOLOGIES CO., LTD.
Reel/Frame 073949/0127 →
Continuity (2)
Continuation PCTCN2020114127 · Sep 9, 2020
Related Publication 20230216426A1 · Jul 6, 2023
References Cited (9)
US 5633791A · Poon · 1997 [cited by examiner]
US 11581820B1 · Mekonnen · 2023 [cited by examiner]
US 20050139259A1 · Steigerwald · 2005 [cited by examiner]
US 20130088901A1 · Bleus · 2013 [cited by examiner]
US 20130235626A1 · Jang · 2013 [cited by examiner]
US 20150131352A1 · Hart · 2015 [cited by examiner]
US 20150214856A1 · Nakashima · 2015 [cited by examiner]
CN 109327154A · 2019 [cited by applicant]
CN 106877720B · 2019 [cited by applicant]