Display substrate, display panel and display apparatus
A display substrate is provided to include: a first base substrate including a sealing region and a display port region, wherein at least one first connection region and at least one second connection region are in the display port region, a first overlapping region is formed between the second and first connection regions; first and second connection terminals in the first and second connection regions, respectively; and a planarization layer including at least one first trench and at least one second trench corresponding to the first and second connection regions therein, respectively; orthographic projections of bottoms of first and second trenches on the first base substrate cover corresponding first and second connection regions, respectively; the planarization layer includes: a first pattern corresponding to the first overlapping region; orthographic projections of the first pattern and its corresponding first overlapping region on the first base substrate overlap with each other.
1 . A display substrate, comprising:
a first base substrate comprising a sealing region and a display port region arranged along a first direction, wherein at least one first connection region and at least one second connection region arranged on a side of the at least one first connection region away from the sealing region are in the display port region, the at least one second connection region and the at least one first connection region are arranged at intervals, at least one first overlapping region is formed between the at least one second connection region and the at least one first connection region, and each of the at least one first overlapping region is a region between one of the at least one first connection region and one of the at least one second connection region and overlapping with the first connection region and the second connection region in the first direction;
a plurality of first connection terminals and a plurality of second connection terminals on the first base substrate, wherein the plurality of first connection terminals are in the at least one first connection region, and the plurality of second connection terminals are in the at least one second connection region; and
a planarization layer on a side of the plurality of first connection terminals and the plurality of second connection terminals away from the first base substrate, wherein at least one first trench corresponding to the at least one first connection region and at least one second trench corresponding to the at least one second connection region are provided in the planarization layer; an orthographic projection of a bottom of each of the at least one first trench on the first base substrate covers a corresponding first connection region, an orthographic projection of a bottom of each of the at least one second trench on the first base substrate covers a corresponding second connection region; the planarization layer comprises: at least one first pattern corresponding to the at least one first overlapping region; an orthographic projection of the first pattern on the first base substrate overlaps with a corresponding first overlapping region,
wherein the display substrate further comprises a first separation region between the sealing region and the display port region, wherein at least one second overlapping region is formed between the at least one first connection region and the first separation region, and each of the at least one second overlapping region is a region between one of the at least one first connection region and the first separation region and overlapping with both the first connection region and the first separation region in the first direction;
the planarization layer is provided with a third trench corresponding to the first separation region, and an orthographic projection of a bottom of the third trench on the first base substrate covers an orthographic projection of the third trench on the first base substrate; and
the planarization layer further comprises: at least one second pattern corresponding to the at least one second overlapping region, and an orthographic projection of the second pattern on the first base substrate overlaps with a corresponding second overlapping region.
2 . The display substrate of claim 1 , wherein the first pattern extends along a second direction and traverses the corresponding first overlapping region in the second direction; and
the second direction intersects the first direction.
3 . The display substrate of claim 1 , wherein the first trench and the second trench corresponding to the first connection region and the second connection region with the first overlapping region therebetween are separated from each other along the first direction by the first pattern corresponding to the first overlapping region.
4 . The display substrate of claim 1 , wherein the first overlapping region has a width in the first direction of greater than or equal to 500 μm; and
wherein the first pattern has a width in the first direction of greater than or equal to 120 μm.
5 . The display substrate of claim 1 , wherein the second pattern extends along the second direction and traverses the corresponding second overlapping region in the second direction; and
the second direction intersects the first direction.
6 . The display substrate of claim 1 , wherein the first trench and the third trench corresponding to the first connection region and the first separation region with the second overlapping region therebetween are separated from each other by the second pattern corresponding to the second overlapping region.
7 . The display substrate of claim 1 , wherein the second overlapping region has a width in the first direction of greater than or equal to 400 μm; and
the second pattern has a width in the first direction of greater than or equal to 120 μm.
8 . The display substrate of claim 1 , wherein the sealing region comprises: a display region and a non-display region surrounding the display region, and a region where the orthographic projection of the bottom of the third trench on the first base substrate is located is a first projection region; and
an edge of the first projection region close to the display region is within the non-display region.
9 . The display substrate of claim 1 , wherein the at least one first connection region comprises a plurality of first connection regions, the at least one first trench comprises a plurality of first trenches, the plurality of first trenches and the plurality of first connection regions are in one-to-one correspondence with each other, the plurality of first trenches are arranged at intervals along a second direction; and a distance between any two adjacent first trenches in the second direction is greater than or equal to 6 μm; and/or
the at least one second connection region comprises a plurality of second connection regions, the at least one second trench comprises a plurality of second trenches, the plurality of second trenches and the plurality of second connection regions are in one-to-one correspondence with each other, the plurality of second trenches are arranged at intervals along the second direction; and a distance between any two adjacent second trenches in the second direction is greater than or equal to 6 μm,
wherein the second direction intersects the first direction.
10 . A display panel, comprising: the display substrate of claim 1 and an opposite substrate opposite to the display substrate.
11 . The display panel of claim 10 , further comprising:
a post spacer on a side of the opposite substrate close to the display substrate; and
a frame sealing glue between the display substrate and the opposite substrate;
wherein an outer edge of the frame sealing glue is an edge of the sealing region.
12 . The display panel of claim 11 , wherein the first base substrate further comprises a second separation region; the second separation region and the sealing region are arranged in a second direction; the sealing region comprises: a display region and a non-display region surrounding the display region, the non-display region comprising: a functional region between the display region and the second separation region; the functional region comprises: a driving circuit arrangement region, a driving circuit clock signal trace arrangement region, and a display signal trace arrangement region, which are sequentially arranged away from the display region in the second direction; the driving circuit arrangement region is provided with a gate driving circuit therein, the driving circuit clock signal trace arrangement region is provided with a plurality of driving circuit clock signal traces therein, and the display signal trace arrangement region is provided with a display signal trace therein; the planarization layer is provided with a fourth trench corresponding to the second separation region therein, and an orthographic projection of the fourth trench on the first base substrate covers the second separation region; and a region where an orthographic projection of a bottom of the fourth trench on the first base substrate is located is a third orthographic projection region, and an edge of the third orthographic projection region close to the display region is between the driving circuit arrangement region and an edge of the display signal trace arrangement region close to the second separation region; wherein the second direction intersects the first direction,
the edge of the third orthographic projection region close to the display region is in the display signal trace arrangement region, and
a width K1 of the fourth trench in the second direction satisfies:
K 0< K 1≤½× K 2+ K 0,
where K0 is a width of the second separation region in the second direction, and K2 is a width, in the second direction, of the frame sealing glue at a side close to the second separation region.
13 . The display panel of claim 11 , wherein the first base substrate further comprises a second separation region; the second separation region and the sealing region are arranged in a second direction; the sealing region comprises: a display region and a non-display region surrounding the display region, the non-display region comprising: a functional region between the display region and the second separation region; the functional region comprises: a driving circuit arrangement region, a driving circuit clock signal trace arrangement region, and a display signal trace arrangement region, which are sequentially arranged away from the display region in the second direction; the driving circuit arrangement region is provided with a gate driving circuit therein, the driving circuit clock signal trace arrangement region is provided with a plurality of driving circuit clock signal traces therein, and the display signal trace arrangement region is provided with a display signal trace therein; the planarization layer is provided with a fourth trench corresponding to the second separation region therein, and an orthographic projection of the fourth trench on the first base substrate covers the second separation region; and a region where an orthographic projection of a bottom of the fourth trench on the first base substrate is located is a third orthographic projection region, and an edge of the third orthographic projection region close to the display region is between the driving circuit arrangement region and an edge of the display signal trace arrangement region close to the second separation region; wherein the second direction intersects the first direction,
wherein the functional region further comprises: a driving circuit non-clock signal trace arrangement region; the driving circuit non-clock signal trace arrangement region is between the driving circuit clock signal trace arrangement region and the driving circuit arrangement region; and the driving circuit non-clock signal trace arrangement region is provided with a driving circuit non-clock signal trace therein; and the edge of the third orthographic projection region close to the display region is in the driving circuit non-clock signal trace arrangement region, and
a width K1 of the fourth trench in the second direction satisfies:
K 2+ K 0≤ K 1≤1.4× K 2+ K 0,
where K0 is a width of the second separation region in the second direction, and K2 is a width, in the second direction, of the frame sealing glue at a side close to the second separation region.
14 . A display apparatus, comprising: the display panel of claim 10 .
15 . A display substrate, comprising:
a first base substrate comprising a sealing region and a display port region arranged along a first direction, wherein at least one first connection region and at least one second connection region arranged on a side of the at least one first connection region away from the sealing region are in the display port region, the at least one second connection region and the at least one first connection region are arranged at intervals, at least one first overlapping region is formed between the at least one second connection region and the at least one first connection region, and each of the at least one first overlapping region is a region between one of the at least one first connection region and one of the at least one second connection region and overlapping with the first connection region and the second connection region in the first direction;
a plurality of first connection terminals and a plurality of second connection terminals on the first base substrate, wherein the plurality of first connection terminals are in the at least one first connection region, and the plurality of second connection terminals are in the at least one second connection region; and
a planarization layer on a side of the plurality of first connection terminals and the plurality of second connection terminals away from the first base substrate, wherein at least one first trench corresponding to the at least one first connection region and at least one second trench corresponding to the at least one second connection region are provided in the planarization layer; an orthographic projection of a bottom of each of the at least one first trench on the first base substrate covers a corresponding first connection region, an orthographic projection of a bottom of each of the at least one second trench on the first base substrate covers a corresponding second connection region; the planarization layer comprises: at least one first pattern corresponding to the at least one first overlapping region; an orthographic projection of the first pattern on the first base substrate overlaps with a corresponding first overlapping region, wherein a region where an orthographic projection of the planarization layer on the first base substrate is located is a second projection region;
for any one of the plurality of first connection terminals, a minimum distance from the first connection terminal to the second projection region along the first direction is greater than or equal to 50 μm;
for any one of the plurality of first connection terminals, a minimum distance from the first connection terminal to the second projection region along a second direction is greater than or equal to 1500 μm;
for any one of the plurality of second connection terminals, a minimum distance from the second connection terminal to the second projection region along the first direction is greater than or equal to 50 μm; and
for any one of the plurality of second connection terminals, a minimum distance from the second connection terminal to the second projection region along the second direction is greater than or equal to 1500 μm,
wherein the second direction intersects the first direction.
16 . A display substrate, comprising:
a first base substrate comprising a sealing region and a display port region arranged along a first direction, wherein at least one first connection region and at least one second connection region arranged on a side of the at least one first connection region away from the sealing region are in the display port region, the at least one second connection region and the at least one first connection region are arranged at intervals, at least one first overlapping region is formed between the at least one second connection region and the at least one first connection region, and each of the at least one first overlapping region is a region between one of the at least one first connection region and one of the at least one second connection region and overlapping with the first connection region and the second connection region in the first direction;
a plurality of first connection terminals and a plurality of second connection terminals on the first base substrate, wherein the plurality of first connection terminals are in the at least one first connection region, and the plurality of second connection terminals are in the at least one second connection region; and
a planarization layer on a side of the plurality of first connection terminals and the plurality of second connection terminals away from the first base substrate, wherein at least one first trench corresponding to the at least one first connection region and at least one second trench corresponding to the at least one second connection region are provided in the planarization layer; an orthographic projection of a bottom of each of the at least one first trench on the first base substrate covers a corresponding first connection region, an orthographic projection of a bottom of each of the at least one second trench on the first base substrate covers a corresponding second connection region; the planarization layer comprises: at least one first pattern corresponding to the at least one first overlapping region; an orthographic projection of the first pattern on the first base substrate overlaps with a corresponding first overlapping region, wherein the first base substrate further comprises a second separation region; the second separation region and the sealing region are arranged in a second direction;
the sealing region comprises: a display region and a non-display region surrounding the display region, the non-display region comprising: a functional region between the display region and the second separation region;
the functional region comprises: a driving circuit arrangement region, a driving circuit clock signal trace arrangement region, and a display signal trace arrangement region, which are sequentially arranged away from the display region in the second direction;
the driving circuit arrangement region is provided with a gate driving circuit therein, the driving circuit clock signal trace arrangement region is provided with a plurality of driving circuit clock signal traces therein, and the display signal trace arrangement region is provided with a display signal trace therein;
the planarization layer is provided with a fourth trench corresponding to the second separation region therein, and an orthographic projection of the fourth trench on the first base substrate covers the second separation region; and
a region where an orthographic projection of a bottom of the fourth trench on the first base substrate is located is a third orthographic projection region, and an edge of the third orthographic projection region close to the display region is between the driving circuit arrangement region and an edge of the display signal trace arrangement region close to the second separation region;
wherein the second direction intersects the first direction.
17 . The display substrate of claim 16 , wherein the edge of the third orthographic projection region close to the display region and the driving circuit clock signal trace arrangement region do not overlap with each other.
18 . The display substrate of claim 16 , wherein the edge of the third orthographic projection region close to the display region is in the display signal trace arrangement region.
19 . The display substrate of claim 16 , wherein the functional region further comprises: a driving circuit non-clock signal trace arrangement region;
the driving circuit non-clock signal trace arrangement region is between the driving circuit clock signal trace arrangement region and the driving circuit arrangement region; and the driving circuit non-clock signal trace arrangement region is provided with a driving circuit non-clock signal trace therein; and
the edge of the third orthographic projection region close to the display region is in the driving circuit non-clock signal trace arrangement region.