Method and system for dynamically updating stack canary
A canary update method according to some embodiments is disclosed. The canary update method includes executing, by a processor configured to process tasks including the canary, computer program instructions to perform operations including extracting, by a processor, a first value from an array including N values, setting the canary to the first value, determining that the canary is updated based on a canary flag value of a first task, extracting, when determined that the canary is updated, a second value from the array, and updating the canary of the first task to the second value. The processor is configured to access a memory through a mapping circuit, and the mapping circuit includes mapping information between a physical memory region in the memory corresponding to the first task and a virtual memory region associated with the mapping circuit.
1 . A method of updating a canary included in a task to be processed by a processor, the method comprising:
executing, by the processor configured to process tasks including the canary, computer program instructions to perform operations comprising:
extracting a first value from an array including N values and setting the canary to the first value, wherein N is an integer greater than or equal to 1;
determining, based on a canary flag value of a first task, that the canary is to be updated; and
extracting, after determining that the canary is to be updated, a second value from the array and updating the canary of the first task to the second value,
wherein the processor is configured to access a memory through a mapping circuit, and
wherein the mapping circuit includes mapping information between a physical memory region in the memory corresponding to the first task and a virtual memory region associated with the mapping circuit.
2 . The method of claim 1 , further comprising:
initializing the array when a system boots,
wherein the system comprises the processor.
3 . The method of claim 1 , wherein the setting the canary to the first value comprises:
setting the canary flag value to a first flag value when starting an operation on the first task; and
setting the canary flag value to a second flag value when ending the operation on the first task.
4 . The method of claim 3 , wherein the determining that the canary is to be updated comprises:
determining, when the canary flag value is set to the second flag value, that the canary is to be updated.
5 . The method of claim 1 , wherein the array includes a plurality of values different from each other.
6 . The method of claim 1 , wherein the first value is different from the second value.
7 . The method of claim 1 , wherein the updating the canary to the second value is performed when the processor is in an idle state.
8 . The method of claim 1 , wherein the updating the canary to the second value comprises:
setting the second value as the canary of the first task;
comparing the canary of the first task to a plurality of values included in the array; and
terminating an operation of a system if the canary of the first task is different from all of the plurality of values included in the array.
9 . The method of claim 1 , further comprising:
extracting, by the processor, a third value from the array and setting the third value as a canary to be used for a second task,
wherein the third value is different from the first value.
10 . The method of claim 4 , further comprising, after determining that the canary of the first task is to be updated, storing canary update-to-be-performed information of the first task in a canary update queue.
11 . The method of claim 1 , further comprising, when the processor is performing an operation on the first task, setting, to a first mode, a first memory region of the virtual memory region allocated to the first task and setting a second memory region of the virtual memory region to a second mode.
12 . A system comprising:
a first processor configured to process tasks;
a memory comprising an array including a plurality of values, and regions allocated to the tasks to be processed by the first processor; and
a mapping circuit configured to map a physical memory region among the regions allocated to the tasks to a virtual memory region, wherein the first processor is further configured to perform operations comprising:
extracting a first value from the array,
setting a canary of a first task to the first value,
determining, based on a change in a canary flag value of the first task, that the canary of the first task is to be updated, and
after determining that the canary is to be updated, extracting a second value from the array and updating the canary of the first task to the second value.
13 . The system of claim 12 , further comprising:
a second processor,
wherein the second processor is configured to generate N different values when the system boots, wherein N is an integer greater than or equal to 1, and
wherein the first processor is further configured to initialize the array based on the N different values.
14 . The system of claim 13 , wherein the second processor is further configured to generate the N different values when a number of updates of the canary is a reference value or greater, and
wherein the first processor is further configured to initialize the array based on the N different values when the number of updates of the canary is the reference value or greater.
15 . The system of claim 12 , wherein the array includes a plurality of values different from each other, and the first value is different from the second value.
16 . The system of claim 12 , wherein the mapping circuit is further configured to, when the first processor is performing an operation on the first task, setting, to a first mode, a first memory region of the virtual memory region allocated to the first task and setting a second memory region of the virtual memory region to a second mode.
17 . A non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to perform operations comprising:
extracting a first value from an array including N values and setting a canary to the first value, wherein N is an integer greater than or equal to 1;
determining, based on a canary flag value of a task, that the canary is to be updated; and
extracting, after determining that the canary is to be updated, a second value from the array and updating the canary of the task to the second value,
wherein the processor is configured to access a memory through a mapping circuit, and
wherein the mapping circuit includes mapping information between a physical memory region in the memory corresponding to the task and a virtual memory region associated with the mapping circuit.
18 . The non-transitory computer-readable storage medium of claim 17 , wherein the setting the canary to the first value comprises:
setting the canary flag value to a first flag value when starting an operation on the task; and
setting the canary flag value to a second flag value when ending the operation on the task.
19 . The non-transitory computer-readable storage medium of claim 18 , wherein the determining that the canary is to be updated comprises:
determining, when the canary flag value is set to the second flag value, that the canary is to be updated.
20 . The non-transitory computer-readable storage medium of claim 17 , wherein the updating the canary to the second value comprises:
setting the second value as the canary of the task;
comparing the canary of the task to a plurality of values included in the array; and
terminating an operation of a system if the canary of the task is different from all of the plurality of values included in the array.