IP Library › Granted Patent US 12,639,503
Granted Patent B2
US 12,639,503 · App. 17/177,502 · Granted May 26, 2026

Automatic robust optimization of circuits

Inventors: Chai Wah Wu (Hopewell Junction, NY); Ann Chen Wu (Hopewell Junction, NY); James Strom (Rochester, MN)
Assignee: International Business Machines Corporation
G06F30/398G06F30/27G06F30/373G06N3/0499G06N3/08G06N3/09G06N5/01G06F17/11G06N3/065G06N3/126G06N7/01
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Quick Facts
Patent No.
US 12,639,503
App. No.
17/177,502
Granted
May 26, 2026
Kind
B2
Abstract

Embodiments of the invention are directed to using a trained machine learning model to generate predicted circuit data for a circuit design, and computing an objective function using the predicted circuit data. Optimization of the objective function is performed to generate an optimal solution, and the optimal solution is mapped to the circuit design.

Claims (43)

1 . A computer-implemented method for a circuit design of an integrated circuit, the method comprising:

executing a trained neural network to generate predicted circuit data for the circuit design, wherein the predicted circuit data comprises predicted input and output pairs, wherein the trained neural network is trained on training data of process corners for circuit designs, the training data comprising circuit simulator data generated by executing a circuit simulator, the circuit simulator data comprising training input and output pairs that are input to the trained neural network, wherein the predicted circuit data output from the trained neural network comprises a phase margin or common mode offset voltage;

in response to receiving an objective function based on the predicted input and output pairs and in response to receiving an optimal solution based on the objective function, executing the circuit simulator to validate the optimal solution for the circuit design such that validation results are fed back to the trained neural network for reinforcement learning, wherein the validation results for the circuit design are compared to the predicted circuit data comprising the phase margin or the common mode offset voltage of the neural network for the reinforcement learning; and

mapping the optimal solution to circuit elements of the circuit design.

2 . The computer-implemented method of claim 1 , wherein the trained neural network is executed based on input comprising resistance, capacitance, device size, temperature, supply voltage, supply current, and a process corner for the circuit design.

3 . The computer-implemented method of claim 1 , wherein values of the optimal solution are inserted into the circuit simulator for a resistance, a capacitance, and a transistor to generate the validation results.

4 . The computer-implemented method of claim 1 , wherein the optimization is performed using a genetic algorithm.

5 . The computer-implemented method of claim 1 , wherein the optimization is performed using a swarm optimization algorithm.

6 . The computer-implemented method of claim 1 , wherein the optimization is performed using a Bayes black box optimization algorithm.

7 . The computer-implemented method of claim 1 , wherein the objective function is computed using a Monte Carlo analysis.

8 . The computer-implemented method of claim 1 , wherein the objective function is computed as a worst-case solution among process corners and operating conditions.

9 . The computer-implemented method of claim 1 , further comprising:

generating the circuit simulator data in a parameter space for the circuit design, wherein the predicted circuit data output from the trained neural network comprises power.

10 . A system comprising:

a memory having computer readable instructions; and

one or more processors for executing the computer readable instructions, the computer readable instructions controlling the one or more processors to perform operations comprising:

executing a trained neural network to generate predicted circuit data for a circuit design, wherein the predicted circuit data comprises predicted input and output pairs, wherein the trained neural network is trained on training data of process corners for circuit designs, the training data comprising circuit simulator data generated by executing a circuit simulator, the circuit simulator data comprising training input and output pairs that are input to the trained neural network, wherein the predicted circuit data output from the trained neural network comprises a phase margin or common mode offset voltage;

in response to receiving an objective function based on the predicted input and output pairs and in response to receiving an optimal solution based on the objective function on the objective function, executing the circuit simulator to validate the optimal solution for the circuit design such that validation results are fed back to the trained neural network for reinforcement learning, wherein the validation results for the circuit design are compared to the predicted circuit data comprising the phase margin or the common mode offset voltage of the neural network for the reinforcement learning; and

mapping the optimal solution to circuit elements of the circuit design.

11 . The system of claim 10 , wherein the trained neural network is executed based on input comprising resistance, capacitance, device size, temperature, supply voltage, supply current, and a process corner for the circuit design.

12 . The system of claim 10 , wherein values of the optimal solution are inserted into the circuit simulator for a resistance, a capacitance, and a transistor to generate the validation results.

13 . The system of claim 10 , wherein the optimization is performed using a genetic algorithm.

14 . The system of claim 10 , wherein the optimization is performed using a swarm optimization algorithm.

15 . The system of claim 10 , wherein the optimization is performed using a Bayes black box optimization algorithm.

16 . The system of claim 10 , wherein the objective function is computed using a Monte Carlo analysis.

17 . The system of claim 10 , wherein the objective function is computed as a worst-case solution among process corners and operating conditions.

18 . A computer program product comprising a non-transitory computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform operations comprising:

executing a trained neural network to generate predicted circuit data for a circuit design, wherein the predicted circuit data comprises predicted input and output pairs, wherein the trained neural network is trained on training data of process corners for circuit designs, the training data comprising circuit simulator data generated by executing a circuit simulator, the circuit simulator data comprising training input and output pairs that are input to the trained neural network, wherein the predicted circuit data output from the trained neural network comprises a phase margin or common mode offset voltage;

in response to receiving an objective function based on the predicted input and output pairs and in response to receiving an optimal solution based on the objective function, executing the circuit simulator to validate the optimal solution for the circuit design such that validation results are fed back to the trained neural network for reinforcement learning, wherein the validation results for the circuit design are compared to the predicted circuit data comprising the phase margin or the common mode offset voltage of the neural network for the reinforcement learning; and

mapping the optimal solution to circuit elements of the circuit design.

19 . The computer program product of claim 18 , wherein the trained neural network is executed based on input comprising resistance, capacitance, device size, temperature, supply voltage, supply current, and a process corner for the circuit design.

20 . The computer program product of claim 18 , wherein values of the optimal solution are inserted into the circuit simulator for a resistance, a capacitance, and a transistor to generate the validation results.

21 . The computer program product of claim 18 , wherein the optimization is performed using a selection from the group consisting of a genetic algorithm, a swarm optimization algorithm, and a Bayes black box optimization algorithm.

22 . The computer program product of claim 18 , wherein the objective function is computed using a Monte Carlo analysis.

23 . The computer program product of claim 18 , further comprising generating the circuit simulator data in a parameter space for the circuit design, wherein the predicted circuit data output from the trained neural network comprises power.

24 . A computer-implemented method for using a graphical user interface for tuning a circuit design comprising:

executing, using the graphical user interface, a selection configured to train a neural network using circuit simulator data in a parameter space for the circuit design, the circuit simulator data being from a circuit simulator, wherein the neural network is used to generate predicted circuit data for the circuit design, wherein the predicted circuit data comprises predicted input and output pairs, wherein the trained neural network is trained on training data of process corners for circuit designs, the circuit simulator data comprising training input and output pairs that are input to the trained neural network, wherein the predicted circuit data output from the trained neural network comprises a phase margin or common mode offset voltage;

in response to using the graphical user interface to receive an objective function based on the predicted input and output pairs and in response to receiving an optimal solution based on the objective function, executing the circuit simulator to validate the optimal solution for the circuit design such that validation results are fed back to the trained neural network for reinforcement learning, wherein the validation results for the circuit design are compared to the predicted circuit data comprising the phase margin or the common mode offset voltage of the neural network for the reinforcement learning.

25 . A system for using a graphical user interface for tuning a circuit design comprising:

a memory having computer readable instructions; and

one or more processors for executing the computer readable instructions, the computer readable instructions controlling the one or more processors to perform operations comprising:

executing, using the graphical user interface, a selection configured to train a neural network using circuit simulator data in a parameter space for the circuit design, the circuit simulator data being from a circuit simulator, wherein the neural network is used to generate predicted circuit data for the circuit design, wherein the predicted circuit data comprises predicted input and output pairs, wherein the trained neural network is trained on training data of process corners for circuit designs, the circuit simulator data comprising training input and output pairs that are input to the trained neural network, wherein the predicted circuit data output from the trained neural network comprises a phase margin or common mode offset voltage;

in response to using the graphical user interface to receive an objective function based on the predicted circuit data and in response to receiving an optimal solution based on the objective function, executing the circuit simulator to validate the optimal solution for the circuit design such that validation results are fed back to the trained neural network for reinforcement learning, wherein the validation results for the circuit design are compared to the predicted circuit data comprising the phase margin or the common mode offset voltage of the neural network for the reinforcement learning.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2021
From: WU, CHAI WAH; WU, ANN; STROM, JAMES
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 055297/0033 →
Continuity (1)
Related Publication 20220261654A1 · Aug 18, 2022
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