Display device and method of driving the same

1 . A display device comprising:

a display panel including a pixel;

a gate driver which applies a first signal to the pixel; and

a driving controller which receives a second signal, receives input data at a variable frame frequency, and controls the gate driver,

wherein a frame period for the display panel includes a scan period or one or more hold periods,

wherein the driving controller generates a value by counting a number of pulses of the second signal, and determines a current frame period as a hold period when the value exceeds a reference value, and

wherein a time length of the first signal in each of the one or more hold periods is longer than a time length of the first signal in the scan period.

2 . The display device of claim 1 , wherein the driving controller determines the frame period for the display panel based on the variable frame frequency in a way such that a time length of the frame period is N times of a time length of a minimum frame period, wherein N is a positive number greater than 1, and

wherein the frame period includes one scan period having a time length substantially the same as the time length of the minimum frame period and N−1 hold periods, each having a time length substantially the same as the time length of the minimum frame period.

3 . The display device of claim 1 , wherein, when the value is less than or equal to the reference value, the driving controller determines the current frame period as the scan period.

4 . The display device of claim 1 , wherein, in the scan period and the one or more hold periods, the driving controller counts the number of the pulses of the second signal.

5 . The display device of claim 4 , wherein, when a scan start signal having an activation pulse at a beginning of the scan period is activated, the driving controller resets the value.

6 . The display device of claim 1 , wherein the scan period includes an active period and a vertical blank period, and each of the one or more hold period includes the vertical blank period,

wherein the driving controller does not count the second signal in the active period, and counts the second signal in the vertical blank period to generate the value, and

wherein the driving controller determines the current frame period as the hold period when the value exceeds the reference value.

7 . The display device of claim 6 , wherein, when a vertical blank start signal having an activation pulse at a beginning of the vertical blank period is activated, the driving controller starts to count the second signal.

8 . The display device of claim 6 , wherein, when a scan start signal having an activation pulse at a beginning of the scan period is activated, the driving controller resets the value.

9 . The display device of claim 6 , wherein, until a vertical blank start signal is activated after a scan start signal is activated, the driving controller does not count the second signal.

10 . The display device of claim 1 , wherein the gate driver applies the first signal to the pixel in response to clock signals,

wherein the clock signals include first to fourth clock signals, and

wherein the gate driver includes a shift register including stages which sequentially apply the first signals to odd-numbered pixel rows in response to the first and second clock signals, and sequentially apply the first signals to even-numbered pixel rows in response to the third and fourth clock signals.

11 . The display device of claim 1 , wherein the time length of the first signal in the one or more hold periods is gradually increased every hold period.

12 . The display device of claim 1 , wherein the gate driver applies the first signal to the pixel in response to clock signals, and

wherein start points of pulses of the first signal in one hold period are adjusted by adjusting start points of pulses of the clock signals in the one hold period, or

wherein end points of the pulses of the first signal in the one hold period are adjusted by adjusting end points of the pulses of the clock signals in the one hold period.

13 . The display device of claim 1 , wherein the gate driver applies the first signal to the pixel in response to clock signals, and

wherein start points of pulses of the first signal in the scan period are adjusted by adjusting start points of pulses of the clock signals in the scan period, or

wherein end points of the pulses of the first signal in the scan period are adjusted by adjusting end points of the pulses of the clock signals in the scan period.

14 . The display device of claim 1 , wherein the first signal in the one or more hold periods is output in response to clock signals in the one or more hold periods, and

wherein the clock signals have a time length of P horizontal periods, wherein P is a positive number greater than 1.

15 . The display device of claim 1 , wherein the first signal is an anode initialization signal.

16 . The display device of claim 1 , wherein the second signal is a horizontal synchronization signal.

17 . The display device of claim 1 , wherein the input data is input image data.

18 . A method of driving a display device, the method comprising:

determining whether a display device is in a variable frequency mode;

counting a number of pulses of a second signal to generate a value when the display device is in the variable frequency mode, and determining a current frame period as a hold period when the value exceeds a reference value; and

setting a time length of a first signal in the hold period to be longer than a time length of the first signal in a scan period in response to clock signals when the current frame period is the hold period.

19 . The method of claim 18 , wherein, when a scan start signal having an activation pulse at a beginning of the scan period is activated, the value is reset.

20 . An electronic device comprising:

a display panel including a pixel;

a gate driver which applies a first signal to the pixel;

a driving controller which receives a second signal, receives input data at a variable frame frequency, and controls the gate driver; and

a processor which controls the driving controller,

wherein a frame period for the display panel includes a scan period or one or more hold periods,

wherein the driving controller generates a value by counting a number of pulses of the second signal, and determines a current frame period as a hold period when the value exceeds a reference value, and

wherein a time length of the first signal in each of the one or more hold periods is longer than a time length of the first signal in the scan period.