IP Library › Granted Patent US 12,641,726
Granted Patent B2
US 12,641,726 · App. 18/625,488 · Granted May 26, 2026

Printed circuit board

Inventors: Seung Eun Lee (Suwon-si, KR); Ki Hwan Kim (Suwon-si, KR)
Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
H05K1/162H05K1/0306H05K1/115H05K2201/09509H05K2201/09545
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Quick Facts
Patent No.
US 12,641,726
App. No.
18/625,488
Granted
May 26, 2026
Kind
B2
Abstract

The present disclosure relates to a printed circuit board including: a glass layer; a plurality of blind cavities respectively penetrating through a portion of the glass layer from an upper surface or a lower surface of the glass layer; a plurality of passive elements respectively disposed in the plurality of blind cavities; and an insulating layer covering at least a portion of each of the glass layer and the plurality of passive elements and disposed in at least a portion of each of the plurality of blind cavities. At least two of the plurality of blind cavities have different depths.

Claims (84)

1 . A printed circuit board, comprising:

a glass layer;

a plurality of blind cavities respectively penetrating through a portion of the glass layer from an upper surface or a lower surface of the glass layer;

a plurality of passive elements respectively disposed in the plurality of blind cavities; and

an insulating layer covering at least a portion of each of the glass layer and the plurality of passive elements and disposed in at least a portion of each of the plurality of blind cavities,

wherein at least two of the plurality of blind cavities have different depths,

the plurality of blind cavities include first and second blind cavities respectively penetrating through a portion of the glass layer from the upper surface of the glass layer, and third and fourth blind cavities respectively penetrating through a portion of the glass layer from the lower surface of the glass layer, and

the plurality of passive elements include first to fourth passive elements respectively disposed in the first to fourth blind cavities.

2 . The printed circuit board according to claim 1 , further comprising:

a through-cavity penetrating between the upper surface and the lower surface of the glass layer; and

an electronic component disposed in the through-cavity,

wherein the insulating layer further covers the electronic component and is further disposed in at least a portion of the through-cavity.

3 . The printed circuit board according to claim 2 , wherein the electronic component is thicker than each of the plurality of passive elements.

4 . The printed circuit board according to claim 3 , wherein one of the plurality of passive elements includes a silicon capacitor, and

the electronic component includes a ceramic capacitor.

5 . The printed circuit board according to claim 1 , wherein based on a thickness direction,

the first and third blind cavities at least partially overlap each other, and

the second and fourth blind cavities at least partially overlap each other.

6 . The printed circuit board according to claim 5 , further comprising:

a first wiring layer disposed on bottom surfaces of the first and second blind cavities;

a second wiring layer disposed on bottom surfaces of the third and fourth blind cavities;

third and fourth wiring layers respectively disposed on the upper surface and the lower surface of the glass layer;

fifth and sixth wiring layers respectively disposed on an upper surface and a lower surface of the insulating layer;

a first via layer penetrating through the glass layer between the first and third blind cavities and between the second and fourth blind cavities, and connecting at least a portion of each of the first and second wiring layers to each other;

a second via layer penetrating between the upper surface and the lower surface of the glass layer, and connecting at least a portion of each of the third and fourth wiring layers to each other;

a third via layer penetrating through a portion of an upper side of the insulating layer and connecting at least a portion of each of the third and fifth wiring layers to each other; and

a fourth via layer penetrating through a portion of a lower side of the insulating layer, and connecting at least a portion of each of the fourth and sixth wiring layers to each other.

7 . The printed circuit board according to claim 6 , wherein each of the first to fourth passive elements includes a through-silicon via, and

the through-silicon via of each of the first to fourth passive elements is connected to at least a portion of each of the first and second wiring layers through a first electrical connection metal, respectively.

8 . The printed circuit board according to claim 6 , further comprising:

an insulating material disposed between each of the first to fourth wiring layers and the glass layer; and

a fifth via layer penetrating through the insulating material, and connecting at least a portion of each of the first to fourth wiring layers and the first and second via layers to each other.

9 . The printed circuit board according to claim 8 , wherein the insulating material is disposed to extend on a wall surface of each of the first to fourth blind cavities.

10 . The printed circuit board according to claim 6 , further comprising:

first and second build-up insulating layers respectively disposed on the upper surface and the lower surface of the insulating layer;

a first build-up wiring layer disposed on an upper surface of the first build-up insulating layer;

a second build-up wiring layer disposed on a lower surface of the second build-up insulating layer;

a first build-up via layer penetrating through the first build-up insulating layer, and connecting at least a portion of each of the fifth wiring layer and the first build-up wiring layer to each other;

a second build-up via layer penetrating through the second build-up insulating layer, and connecting at least a portion of each of the sixth wiring layer and the second build-up wiring layer to each other;

a first resist layer disposed on an upper surface of the first build-up insulating layer, and covering at least a portion of the first build-up wiring layer;

a second resist layer disposed on a lower surface of the second build-up insulating layer, and covering at least a portion of the second build-up wiring layer; and

a semiconductor chip disposed on the first resist layer, and connected to the first build-up wiring layer through a second electrical connection metal.

11 . The printed circuit board according to claim 1 , wherein the glass layer includes plate glass.

12 . A printed circuit board, comprising:

a glass layer;

a blind cavity penetrating through a portion of the glass layer from an upper surface or a lower surface of the glass layer;

a through-cavity penetrating between the upper surface and the lower surface of the glass layer;

a passive element disposed in the blind cavity;

an electronic component disposed in the through-cavity;

an insulating layer covering at least a portion of each of the glass layer, the passive element, and the electronic component, and disposed in at least a portion of each of the blind cavity and the through-cavity;

a first wiring layer disposed on a bottom surface of the blind cavity;

third and fourth wiring layers respectively disposed on the upper and lower surfaces of the glass layer;

first and second build-up insulating layers respectively disposed on an upper surface and a lower surface of the insulating layer;

a first build-up wiring layer disposed on an upper surface of the first build-up insulating layer;

a second build-up wiring layer disposed on a lower surface of the second build-up insulating layer;

a first resist layer disposed on an upper surface of the first build-up insulating layer, and covering at least a portion of the first build-up wiring layer; and

a second resist layer disposed on a lower surface of the second build-up insulating layer, and covering at least a portion of the second build-up wiring layer.

13 . The printed circuit board according to claim 12 , wherein the passive element includes a silicon capacitor, and

the electronic component includes a ceramic capacitor.

14 . The printed circuit board according to claim 12 , further comprising:

a semiconductor chip disposed on the first resist layer, and connected to the first build-up wiring layer through an electrical connection metal.

15 . A printed circuit board, comprising:

a glass layer;

a first blind cavity penetrating through a portion of the glass layer from an upper surface of the glass layer;

a second blind cavity penetrating through another portion of the glass layer from a lower surface of the glass layer;

first and second passive elements respectively disposed in the first and second blind cavities, and connected to each other through a first via layer disposed in a portion of the glass layer between the first blind cavity and the second blind cavity; and

an insulating layer covering at least a portion of each of the glass layer and the first and second passive elements and disposed in at least a portion of the first and second blind cavities.

16 . The printed circuit board according to claim 15 , wherein the first and second passive elements have different thicknesses.

17 . The printed circuit board according to claim 16 , further comprising:

a through-cavity penetrating between the upper surface and the lower surface of the glass layer; and

an electronic component disposed in the through-cavity and having a thickness greater than the first and second passive elements,

wherein the insulating layer further covers the electronic component and is further disposed in at least a portion of the through-cavity.

18 . The printed circuit board according to claim 15 , further comprising:

a first wiring layer disposed on a bottom surface of the first blind cavity and connected to the first passive element;

a second wiring layer disposed on a bottom surface of the second blind cavity and connected to the second passive element;

third and fourth wiring layers respectively disposed on the upper surface and the lower surface of the glass layer;

fifth and sixth wiring layers respectively disposed on an upper surface and a lower surface of the insulating layer;

a second via layer penetrating between the upper surface and the lower surface of the glass layer, and connecting at least a portion of each of the third and fourth wiring layers to each other;

a third via layer penetrating through a portion of an upper side of the insulating layer and connecting at least a portion of each of the third and fifth wiring layers to each other; and

a fourth via layer penetrating through a portion of a lower side of the insulating layer, and connecting at least a portion of each of the fourth and sixth wiring layers to each other,

wherein the first via layer connects at least a portion of each of the first and second wiring layers to each other.

19 . The printed circuit board according to claim 18 , wherein the third via layer connects the fifth wiring layer to a pad of the first passive element, and

the fourth via layer connects the sixth wiring layer to a pad of the second passive element.

20 . The printed circuit board according to claim 15 , wherein the glass layer includes plate glass.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2024
From: LEE, SEUNG EUN; KIM, KI HWAN
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 066992/0868 →
Priority Claims (1)
KR 10-2023-0111716 · Aug 25, 2023 · national
Continuity (1)
Related Publication 20250071902A1 · Feb 27, 2025
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