IP Library › Granted Patent US 12,641,881
Granted Patent B2
US 12,641,881 · App. 19/007,714 · Granted May 26, 2026

Display substrate and display device

Inventors: Kohei Hosoyachi (Kameyama City, JP); Yuhichiroh Murakami (Kameyama City, JP); Shige Furuta (Kameyama City, JP); Takahiro Yamaguchi (Kameyama City, JP)
Assignee: Sharp Display Technology Corporation
H10D86/441G02F1/136286G09G3/006G09G2300/0426G09G2310/0286G09G2320/045G09G2330/026G09G2330/027G09G2330/04
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Quick Facts
Patent No.
US 12,641,881
App. No.
19/007,714
Granted
May 26, 2026
Kind
B2
Abstract

A display substrate includes: a first wiring line located in a display region where an image is displayed; a second wiring line located in a non-display region where the image is not displayed; a first circuit unit located in the non-display region and including a first output section connected to the first wiring line and a first input section connected to the second wiring line; and a second circuit unit located in the non-display region and connected to the second wiring line but not connected to the first wiring line, wherein the second circuit unit is located adjacent to the first circuit unit along the second wiring line in the non-display region.

Claims (93)

1 . A display substrate comprising:

a first wiring line located in a display region where an image is displayed;

a second wiring line located in a non-display region where the image is not displayed;

a first circuit unit located in the non-display region and including a first output section connected to the first wiring line and a first input section connected to the second wiring line; and

a second circuit unit located in the non-display region and connected to the second wiring line but not connected to the first wiring line,

wherein at least two circuit units, each being identical to the first circuit unit, are arranged side by side, with a space therebetween, along the second wiring line, and

the second circuit unit is located adjacent to the first circuit unit along the second wiring line and is located between the at least two circuit units in the non-display region.

2 . The display substrate according to claim 1 ,

wherein the second wiring line includes a linear portion, that is linear along a first direction, and a curved portion, that is curved and that intersects the first direction,

at least wiring lines, each being identical to the first wiring line, are arranged side by side, with a space therebetween, in the first direction,

the at least two circuit units are further arranged side by side, with the space therebetween, along the curved portion, and

the second circuit unit is located adjacent to the first circuit unit along the curved portion.

3 . The display substrate according to claim 1 ,

wherein the second wiring line includes a linear portion, that is linear along a first direction, and an inclined linear portion, that is inclined with respect to the first direction,

at least two wiring lines, each being identical to the first wiring line, are arranged side by side, with a space therebetween, in the first direction,

the at least two first circuit units are further arranged side by side, with the space therebetween, along the inclined linear portion, and

the second circuit unit is located adjacent to the first circuit unit along the inclined linear portion.

4 . The display substrate according to claim 1 ,

wherein the first circuit unit is elongated in a direction intersecting the second wiring line, and

the second circuit unit is elongated in parallel with a longitudinal direction of the first circuit unit and is located within a range of the first circuit unit in the longitudinal direction.

5 . The display substrate according to claim 1 , further comprising:

a third wiring line extending along a first direction intersecting the first wiring line in the display region;

a switching element connected to the first wiring line and the third wiring line in the display region;

a pixel electrode connected to the switching element in the display region; and

a signal supply unit connected to the third wiring line and configured to supply an image signal to the third wiring line in the non-display region,

wherein a plurality of wiring lines, each being identical to the first wiring line, and the at least two circuit units are located side by side along the first direction, and

the at least two circuit units form a shift register circuit configured to sequentially supply a scanning signal to the plurality of wiring lines.

6 . The display substrate according to claim 5 ,

wherein the second wiring line is a power source wiring line, and

the second circuit unit is connected to the third wiring line and forms a first protection circuit configured to protect the third wiring line and the switching element from an electrostatic discharge.

7 . The display substrate according to claim 5 , further comprising:

an inspection circuit located on a side, opposite a side of the signal supply unit, with respect to the third wiring line, and connected to the third wiring line in the non-display region; and

an inspection wiring line extending along the second wiring line and connected to the inspection circuit in the non-display region,

wherein the second wiring line is a power source wiring line, and

the second circuit unit is connected to the inspection wiring line and forms a second protection circuit configured to protect the inspection wiring line and the inspection circuit from an electrostatic discharge.

8 . The display substrate according to claim 5 , further comprising:

a charge removal wiring line extending along the second wiring line and set to a common potential, or a ground potential, in the non-display region,

wherein the second wiring line is a first drive wiring line that is connected to the signal supply unit and that receives a first drive signal from the signal supply unit in response to an execution of a power-off sequence, and

the second circuit unit includes a second input section that is connected to the third wiring line, and a second output section that is connected to the charge removal wiring line, and

wherein the second circuit unit forms a charge removal circuit configured to move a charge of the pixel electrode to the charge removal wiring line, via the third wiring line, in response to supply of the first drive signal from the first drive wiring line.

9 . The display substrate according to claim 5 , further comprising:

a position detection electrode in the display region;

a position detection wiring line connected to the position detection electrode and the signal supply unit and configured to receive a position detection signal from the signal supply unit during a position detection period, in which a position detection is performed by the position detection electrode in the display region; and

a common wiring line extending along the second wiring line and having a common potential in the non-display region,

wherein the second wiring line is a second drive wiring line connected to the signal supply unit and configured to receive a second drive signal from the signal supply unit during a display period, in which the image is displayed, and

the second circuit unit includes a third output section, that is connected to the position detection wiring line, and a third input section, that is connected to the common wiring line,

wherein the second circuit unit forms a common potential supply circuit configured to supply a common potential to the position detection electrode, via the position detection wiring line, in response to a the second drive signal supplied by the second drive wiring line.

10 . The display substrate according to claim 9 , further comprising:

a low potential wiring line connected to the signal supply unit and configured to receive a low potential signal from the signal supply unit in the non-display region,

wherein the first circuit unit includes an N-channel transistor,

the common potential supply circuit includes a P-channel transistor,

the N-channel transistor includes a first gate electrode connected to the second wiring line, a first source electrode connected to the low potential wiring line, and a first drain electrode connected to the first wiring line, and

the P-channel transistor includes a second gate electrode connected to the second wiring line, a second source electrode connected to the common wiring line, and a second drain electrode connected to the position detection wiring line.

11 . A display device comprising:

the display substrate according to claim 1 ; and

a counter substrate facing the display substrate.

12 . A display substrate comprising:

a first wiring line located in a display region where an image is displayed;

a second wiring line located in a non-display region where the image is not displayed;

a first circuit unit located in the non-display region and including a first output section connected to the first wiring line and a first input section connected to the second wiring line; and

a second circuit unit located in the non-display region and connected to the second wiring line but not connected to the first wiring line,

wherein:

the second circuit unit is located adjacent to the first circuit unit along the second wiring line in the non-display region, and

the first circuit unit is elongated in a direction intersecting the second wiring line,

wherein the display substrate further includes, in the non-display region:

a third wiring line extending parallel to the second wiring line and located on one end side of the first circuit unit in a longitudinal direction; and

a fourth wiring line extending parallel to the second wiring line and located on another end side of the first circuit unit in the longitudinal direction,

wherein the second circuit unit is located within a range sandwiched between the third wiring line and the fourth wiring line.

13 . A display device comprising:

the display substrate according to claim 12 ; and

a counter substrate facing the display substrate.

14 . A display substrate comprising:

a first wiring line located in a display region where an image is displayed;

a second wiring line located in a non-display region where the image is not displayed;

a first circuit unit located in the non-display region and including a first output section connected to the first wiring line and a first input section connected to the second wiring line;

a second circuit unit located in the non-display region and connected to the second wiring line but not connected to the first wiring line;

a third wiring line intersecting the first wiring line in the display region;

a switching element connected to the first wiring line and the third wiring line in the display region;

a pixel electrode connected to the switching element in the display region;

a first signal supply unit connected to the first wiring line and configured to supply an image signal to the first wiring line in the non-display region; and

a second signal supply unit connected to the third wiring line and configured to supply a scanning signal to the third wiring line in the non-display region,

wherein:

the second circuit unit is located adjacent to the first circuit unit along the second wiring line in the non-display region,

a plurality of first wiring lines, including the first wiring line, is arranged side by side,

the second wiring line is located intersecting the plurality of first wiring lines, and

the first circuit unit is connected to the plurality of first wiring lines, is interposed between the first signal supply unit and the plurality of first wiring lines, and forms a switch circuit configured to distribute the image signal supplied from the first signal supply unit to the plurality of first wiring lines.

15 . The display substrate according to claim 14 , further comprising:

a power source wiring line extending along the second wiring line in the non-display region,

wherein the second wiring line is a switch wiring line connected to the first circuit unit and configured to supply a switch signal for switching the first wiring line that is configured to supply the image signal, and

the second circuit unit is connected to both the switch wiring line and the power source wiring line and forms a third protection circuit configured to protect the switch circuit from an electrostatic discharge.

16 . A display device comprising:

the display substrate according to claim 14 ; and

a counter substrate facing the display substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 2, 2025
From: HOSOYACHI, KOHEI; MURAKAMI, YUHICHIROH; FURUTA, SHIGE; YAMAGUCHI, TAKAHIRO
To: SHARP DISPLAY TECHNOLOGY CORPORATION
Reel/Frame 069717/0983 →
Priority Claims (1)
JP 2024-004416 · Jan 16, 2024 · national
Continuity (1)
Related Publication 20250234649A1 · Jul 17, 2025
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