Semiconductor device and method of manufacturing the same
A semiconductor device includes a base structure comprising a first bonding pad and a first test pad, and a semiconductor chip comprising a second bonding pad being in contact with the first bonding pad of the base structure and a second test pad being in contact with the first test pad of the base structure. A width of the second bonding pad of the semiconductor chip is less than a width of the second test pad of the semiconductor chip. An air gap is provided between the first test pad of the base structure and the second test pad of the semiconductor chip.
1 . A semiconductor device comprising:
a base structure comprising a first bonding pad and a first test pad spaced apart in a first direction; and
a semiconductor chip comprising a second bonding pad in contact with the first bonding pad of the base structure, and a second test pad in direct contact with the first test pad of the base structure, wherein:
a portion of a surface of the first test pad is exposed,
a portion of a surface of the second test pad is exposed, and
the exposed portion of the surface of the first test pad and the exposed portion of the surface of the second test pad define an air gap between the first test pad of the base structure and the second test pad of the semiconductor chip, and
wherein a width along the first direction of the second bonding pad of the semiconductor chip is less than a width along the first direction of the second test pad of the semiconductor chip.
2 . The semiconductor device of claim 1 , wherein a width along the first direction of the first bonding pad of the base structure is less than a width along the first direction of the first test pad of the base structure.
3 . The semiconductor device of claim 1 , wherein the semiconductor chip includes a center region and a surrounding region that surrounds the center region,
wherein the second bonding pad of the semiconductor chip is disposed in the center region of the semiconductor chip, and
wherein the second test pad of the semiconductor chip is disposed in the surrounding region of the semiconductor chip.
4 . The semiconductor device of claim 1 , wherein the second test pad of the semiconductor chip is closer to a side surface of the semiconductor chip than the second bonding pad of the semiconductor chip.
5 . The semiconductor device of claim 1 , wherein:
another portion of the surface of first test pad, different from the exposed portion of the surface of the first test pad, is in contact with the second test pad,
another portion of the surface of the second test pad, different from the exposed portion of the surface of the second test pad, is in contact with the first test pad,
wherein the other portions of the surfaces of the first and second test pads form a contact surface between the first and second test pads, and
wherein the air gap is located between the contact surface and a side surface of the second test pad of the semiconductor chip.
6 . The semiconductor device of claim 5 , wherein the air gap borders the contact surface.
7 . The semiconductor device of claim 5 , wherein a height of an uppermost portion of the air gap is higher than a height of the contact surface, and
wherein a height of a lowermost portion of the air gap is lower than the height of the contact surface, wherein the heights are along a second direction, perpendicular to the first direction.
8 . The semiconductor device of claim 1 , wherein the second test pad of the semiconductor chip comprises: a conductive layer; and a barrier layer partially surrounding the conductive layer, and
wherein the air gap exposes a bottom surface of the barrier layer of the second test pad of the semiconductor chip.
9 . A semiconductor device comprising:
a base structure comprising a first bonding pad and a first test pad spaced apart in a first direction; and
a semiconductor chip comprising a second bonding pad in contact with the first bonding pad of the base structure, and a second test pad in direct contact with the first test pad of the base structure,
wherein a portion of a surface of the first test pad is exposed,
wherein a portion of a surface of the second test pad is exposed,
wherein the exposed portion of the surface of the first test pad and the exposed portion of the surface of the second test pad define an air gap between the first test pad of the base structure and the second test pad of the semiconductor chip,
wherein a width along the first direction of the second bonding pad of the semiconductor chip is less than a width along the first direction of the second test pad of the semiconductor chip,
wherein a width along the first direction of the first bonding pad of the base structure is less than a width along the first direction of the first test pad of the base structure.
10 . The semiconductor device of claim 9 , wherein:
another portion of the surface of first test pad, different from the exposed portion of the surface of the first test pad, is in contact with the second test pad,
another portion of the surface of the second test pad, different from the exposed portion of the surface of the second test pad, is in contact with the first test pad,
the other portions of the surfaces of the first and second test pads form a contact surface between the first and second test pads, and
the air gap borders the contact surface.
11 . The semiconductor device of claim 1 , wherein a contact surface between the first test pad and the second test pad is flat.
12 . The semiconductor device of claim 9 , wherein a contact surface between the first test pad and the second test pad is flat.