IP Library Granted Patent US 12,645,238
Granted Patent B2
US 12,645,238 · App. 18/220,166 · Granted Jun 2, 2026

Dual low-power high-power mode voltage regulator without external compensation

Inventors: Jose Tejada Gomez (Valencia, ES); Santiago Iriarte (Puzol, ES); Ruben Salvador (Valencia, ES)
Assignee: Analog Devices International Unlimited Company
G05F1/565G05F1/66
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Quick Facts
Patent No.
US 12,645,238
App. No.
18/220,166
Granted
Jun 2, 2026
Kind
B2
Abstract

The present subject matter relates to an electronic system comprising gated circuitry, a first regulator circuit directly coupled to the gated circuitry, always-on circuitry, a second regulator circuit directly coupled to the always-on circuitry, and a switch circuit coupled between an output of the first regulator circuit and an output of the second regulator circuit. The always-on circuitry includes control logic configured to activate the second regulator circuit and deactivate the first regulator circuit and the switch circuit in a sleep mode and activate the first regulator circuit and the switch circuit in an active mode.

Claims (53)

1 . An electronic system, the electronic system comprising:

gated circuitry;

a first regulator circuit directly coupled to the gated circuitry;

always-on circuitry;

a second regulator circuit directly coupled to the always-on circuitry;

a switch circuit coupled between an output of the first regulator circuit and an output of the second regulator circuit; and

wherein the always-on circuitry includes control logic configured to:

activate the second regulator circuit and deactivate the first regulator circuit and the switch circuit in a sleep mode; and

activate the first regulator circuit and the switch circuit in an active mode; and

when entering the sleep mode from the active mode, disable the gated circuitry before disabling the switch circuit and disable the switch circuit before deactivating the first regulator circuit.

2 . The electronic system of claim 1 , including:

detection circuitry that detects when the output of the first regulator circuit reaches a predetermined threshold voltage after activation of the first regulator circuit in the active mode; and

wherein the always-on circuitry is configured to activate the switch circuit when the predetermined threshold voltage is reached.

3 . The electronic system of claim 1 ,

wherein the first regulator circuit generates a regulated voltage for a first circuit supply domain of the electronic system and gated circuitry is supplied by the first circuit supply domain; and

wherein the second regulator circuit generates a regulated voltage for a second circuit supply domain of the electronic system and the always-on circuit is supplied by the second circuit supply domain in the sleep mode and by the first circuit supply domain in the active mode.

4 . The electronic system of claim 3 , wherein the first regulator circuit is directly coupled to the first circuit supply domain without a power switch between the first regulator circuit and the first circuit supply domain.

5 . The electronic system of claim 1 , wherein the switch circuit has an internal resistance of one ohm.

6 . The electronic system of claim 1 , wherein the switch circuit has an internal resistance in the range of one ohm to one hundred ohms.

7 . The electronic system of claim 1 , including:

a decoupling capacitor connected to the second regulator circuit; and

wherein the first and second regulator circuits are included in an integrated circuit die and the decoupling capacitor is included in the integrated circuit die.

8 . The electronic system of claim 1 , including fault detection circuitry configured to detect a fault when the electronic system in the sleep mode.

9 . A method of operating a circuit supply of an electronic system, the method comprising:

providing energy to gated circuitry using a first circuit supply rail;

providing energy to always-on circuitry using a second circuit supply rail;

regulating the first circuit supply rail using a first regulator circuit directly coupled to the first circuit supply rail;

regulating the second circuit supply rail using a second regulator circuit directly coupled to the first circuit supply rail;

deactivating the first regulator circuit and activating the second regulator circuit in a sleep mode to provide energy to only the always-on circuitry; and

activating the first regulator circuit and a switch circuit coupled between the first circuit supply rail and the second circuit supply rail in an active mode to provide energy to the always-on circuitry and the gated circuitry; and

when entering the sleep mode from the active mode, disabling the gated circuitry before disabling the switch circuit and disabling the switch circuit before deactivating the first regulator circuit.

10 . The method of claim 9 , wherein activating the first regulator circuit includes:

detecting when an output of the first regulator circuit reaches a predetermined threshold voltage after activation the first regulator circuit; and

activating the switch circuit when the predetermined threshold voltage is reached.

11 . The method of claim 9 , wherein activating the switch circuit includes shorting an output of the first regulator circuit to an output of the second regulator circuit.

12 . The method of claim 9 , wherein the regulating the first circuit supply rail includes regulating using the first regulator circuit directly coupled to the first circuit supply rail without a power switch connected between the first regulator circuit and the first circuit supply rail.

13 . An integrated circuit (IC) die, comprising:

a first regulator circuit directly coupled to a first circuit supply domain to provide a regulated output to the first circuit supply domain;

gated digital circuitry powered by the first circuit supply domain;

a second regulator circuit directly coupled to a second circuit supply domain to provide a regulated output to the second circuit supply domain;

a switch circuit coupled between the output of the first regulator circuit and the output of the second regulator circuit; and

always-on circuitry powered by the second circuit supply domain and including control logic configured to:

activate the second regulator circuit and deactivate the first regulator circuit and the switch circuit in a sleep mode; and

activate the first regulator circuit and the switch circuit in an active mode; and

when entering the sleep mode from the active mode, disable the gated circuitry before disabling the switch circuit and disable the switch circuit before deactivating the first regulator circuit.

14 . The IC die of claim 13 , including a decoupling capacitor internal to the IC die and connected to the second circuit supply domain.

15 . The IC die of claim 13 , including:

detection circuitry that detects when an output of the first regulator circuit reaches a predetermined threshold voltage after activation of the first regulator circuit in the active mode; and

wherein the always-on circuitry is configured to activate the switch circuit when the predetermined threshold voltage is reached.

16 . The IC die of claim 13 , wherein the switch circuit has an internal resistance of one ohm.

17 . The IC die of claim 13 , wherein the switch circuit has an internal resistance in the range of one ohm to one hundred ohms.

18 . The IC die of claim 13 , wherein the first regulator circuit is directly coupled to the first circuit supply domain without a power switch between the first regulator circuit and the first circuit supply domain.

19 . The IC die of claim 13 , wherein the gated digital circuitry includes one or more processors.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 16, 2023
From: GOMEZ, JOSE TEJADA; IRIARTE, SANTIAGO; SALVADOR, RUBEN
To: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY
Reel/Frame 064606/0764 →
Continuity (2)
Provisional Application 63377219 · Sep 27, 2022
Related Publication 20240103551A1 · Mar 28, 2024
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