Timing control circuit and timing control method thereof
A timing control circuit includes a receiving circuit and a line memory. The line memory is configured for receiving a signal, outputting a first data signal corresponding to a first frame of the signal to drive at least one data line, and outputting a second data signal corresponding to a second frame of the signal. After a first frame rate of the first frame is determined to be higher than a second frame rate of the second frame, a switch from a long V mode to a long H mode takes place, such that the first data signal corresponds to the long V mode and the second data signal corresponds to the long H mode. After the first frame rate is determined to be lower than the second frame rate, a switch from the long H mode to the long V mode takes place.
1 . A timing control circuit, comprising:
a receiving circuit; and
a line memory, coupled to the receiving circuit, wherein the line memory is configured for:
receiving a signal;
outputting a first data signal corresponding to a first frame of the signal to drive at least one data line; and
outputting a second data signal corresponding to a second frame of the signal to drive the at least one data line;
wherein after a first frame rate of the first frame is determined to be higher than a second frame rate of the second frame, a switch from a long V mode to a long H mode takes place, such that the first data signal corresponds to the long V mode and the second data signal corresponds to the long H mode;
wherein after the first frame rate is determined to be lower than the second frame rate, a switch from the long H mode to the long V mode takes place, such that the first data signal corresponds to the long H mode and the second data signal corresponds to the long V mode.
2 . The timing control circuit of claim 1 ,
wherein a first touch signal corresponding to the first frame is after the first data signal corresponding to the long V mode;
wherein the second data signal corresponding to the long H mode and a second touch signal corresponding to the second frame are time-interleaved.
3 . The timing control circuit of claim 1 ,
wherein the first data signal corresponding to the long H mode is divided and allocated to non-contiguous time units;
wherein the first data signal corresponding to the long V mode is allocated to a single contiguous time unit.
4 . The timing control circuit of claim 1 ,
wherein the first frame rate determined to be higher than the second frame rate is equal to a first touch report rate corresponding to the first frame;
wherein the first frame rate determined to be lower than the second frame rate is unequal to the first touch report rate.
5 . The timing control circuit of claim 1 ,
wherein the first frame rate is unequal to the second frame rate;
wherein a first touch report rate corresponding to the first frame is equal to a second touch report rate corresponding to the second frame.
6 . The timing control circuit of claim 1 , wherein one of the first data signal and the second data signal corresponds to the long H mode and an extended H mode.
7 . The timing control circuit of claim 1 ,
wherein a number of at least one first pulse within the first frame is equal to a number of at least one second pulse within the second frame;
wherein a first period of the at least one first pulse is unequal to a second period of the at least one second pulse.
8 . The timing control circuit of claim 1 ,
wherein the signal comprises at least one first pulse, which is within the first frame, and at least one second pulse, which is within the second frame;
wherein both a first period for the at least one first pulse and a second period for the at least one second pulse are a horizontal period, a horizontal active line, a blanking-or-low-power period, a horizontal back porch, or a horizontal front porch.
9 . The timing control circuit of claim 1 , wherein when the first frame rate is determined to be equal to the second frame rate, a first touch report rate corresponding to the first frame is unequal to a second touch report rate corresponding to the second frame.
10 . The timing control circuit of claim 1 , wherein the first data signal corresponding to the long V mode corresponds to a longer vertical front porch time than the second data signal corresponding to the long H mode.
11 . A timing control method, comprising:
receiving a signal;
outputting a first data signal corresponding to a first frame of the signal to drive at least one data line; and
outputting a second data signal corresponding to a second frame of the signal to drive the at least one data line;
wherein after a first frame rate of the first frame is determined to be higher than a second frame rate of the second frame, a switch from a long V mode to a long H mode takes place, such that the first data signal corresponds to the long V mode and the second data signal corresponds to the long H mode; and
wherein after the first frame rate is determined to be lower than the second frame rate, a switch from the long H mode to the long V mode takes place, such that the first data signal corresponds to the long H mode and the second data signal corresponds to the long V mode.
12 . The timing control method according to claim 11 ,
wherein a first touch signal corresponding to the first frame is after the first data signal corresponding to the long V mode;
wherein the second data signal corresponding to the long H mode and a second touch signal corresponding to the second frame are time-interleaved.
13 . The timing control method according to claim 11 ,
wherein the first data signal corresponding to the long H mode is divided and allocated to non-contiguous time units;
wherein the first data signal corresponding to the long V mode is allocated to a single contiguous time unit.
14 . The timing control method according to claim 11 ,
wherein the first frame rate determined to be higher than the second frame rate is equal to a first touch report rate corresponding to the first frame;
wherein the first frame rate determined to be lower than the second frame rate is unequal to the first touch report rate.
15 . The timing control method according to claim 11 ,
wherein the first frame rate is unequal to the second frame rate;
wherein a first touch report rate corresponding to the first frame is equal to a second touch report rate corresponding to the second frame.
16 . The timing control method according to claim 11 , wherein one of the first data signal and the second data signal corresponds to the long H mode and an extended H mode.
17 . The timing control method according to claim 11 ,
wherein a number of at least one first pulse within the first frame is equal to a number of at least one second pulse within the second frame;
wherein a first period of the at least one first pulse is unequal to a second period of the at least one second pulse.
18 . The timing control method according to claim 11 ,
wherein the signal comprises at least one first pulse, which is within the first frame, and at least one second pulse, which is within the second frame;
wherein both a first period for the at least one first pulse and a second period for the at least one second pulse are a horizontal period, a horizontal active line, a blanking-or-low-power period, a horizontal back porch, or a horizontal front porch.
19 . The timing control method according to claim 11 , wherein when the first frame rate is determined to be equal to the second frame rate, a first touch report rate corresponding to the first frame is unequal to a second touch report rate corresponding to the second frame.
20 . The timing control method according to claim 11 , wherein the first data signal corresponding to the long V mode corresponds to a longer vertical front porch time than the second data signal corresponding to the long H mode.