Granted Patent B2

US 12,645,369 · App. 18/629,925 · Granted Jun 2, 2026

Inventors: Yang Seok Ki (Palo Alto, CA); Chanik Park (San Jose, CA); Sungwook Ryu (Palo Alto, CA)

Assignee: SAMSUNG ELECTRONICS CO., LTD.

G06F3/0619G06F3/0647G06F3/0685G06F12/0804G06F12/0811

Abstract

Claims (45)

1 . A memory device, comprising:

an interface;

a volatile storage including at least a first area and a second area;

a power source configured to selectively provide power to the second area of the volatile storage;

a non-volatile storage; and

a controller to control the volatile storage and the non-volatile storage,

wherein the memory device is configured to transfer a data from the second area of the volatile storage to the non-volatile storage.

2 . The memory device according to claim 1 , wherein:

the first area is configured to store a first data of a first type; and

the second area is configured to store a second data of a second type.

3 . The memory device according to claim 2 , wherein:

the volatile storage further includes a third area configured to store a third data of a third type; and

the power source is configured to provide power to the second area of the volatile storage and the third area of the volatile storage.

4 . The memory device according to claim 3 , wherein the memory device is configured to transfer at least one of a first data from the second area of the volatile storage or a second data from the third area of the volatile storage to the non-volatile storage.

5 . The memory device according to claim 1 , wherein the interface is configured to receive a load request for a second data and to return the second data from at least one of the first area or the second area.

6 . The memory device according to claim 1 , wherein:

the interface is configured to receive a store request for a second data, the second data including a first size; and

the controller is configured to update a third data in an address in the second area to produce a fourth data based at least in part on the second data and the third data.

7 . The memory device according to claim 1 , wherein a first size of the first area and a second size of the second area are configurable by a user.

8 . The memory device according to claim 1 , wherein the interface supports a first protocol and a second protocol.

9 . A method, comprising:

receiving a load request at a memory device, the load request requesting a data;

locating the data at an address in at least one of a first area of a volatile storage of the memory or a second area of the volatile storage of the memory device; and

returning the data at the address from the memory device,

wherein the memory device includes a non-volatile storage, and

wherein the second area of the volatile storage of the memory device is selectively backed by a power source.

10 . The method according to claim 9 , wherein locating the data at the address in at least one of the first area of the volatile storage of the memory and the second area of the volatile storage of the memory device includes:

loading the data into the address in the first area of the volatile storage of the memory device from the non-volatile storage of the memory device; and

locating the data at the address in the first area of the volatile storage of the memory device.

11 . The method according to claim 10 , wherein loading the data into the address in the first area of the volatile storage of the memory device from the non-volatile storage of the memory device includes allocating the address in the first area of the volatile storage of the memory device.

12 . The method according to claim 10 , wherein loading the data into the address in the first area of the volatile storage of the memory device from the non-volatile storage of the memory device includes deleting a second data from the address in the first area of the volatile storage of the memory device.

13 . The method according to claim 9 , wherein the memory device supports a first protocol and a second protocol.

14 . A method, comprising:

receiving a store request at a memory device, the store request including a first data;

locating a second data at an address in a first area of a volatile storage of the memory device; and

updating the second data at the address in the first area of the volatile storage of the memory device with the first data to produce a third data,

wherein the memory device includes a non-volatile storage,

wherein the first area of the volatile storage of the memory device is selectively backed by a power source configured to provide power to the first area of the volatile storage, and

wherein the volatile storage of the memory device includes a second area.

15 . The method according to claim 14 , wherein locating the second data at the address in the first area of the volatile storage of the memory device includes loading the second data into the address in the first area of the volatile storage of the memory device.

16 . The method according to claim 15 , wherein loading the second data into the address in the first area of the volatile storage of the memory device includes allocating the address in the first area of the volatile storage of the memory device.

17 . The method according to claim 15 , wherein loading the second data into the address in the first area of the volatile storage of the memory device includes evicting a fourth data at the address in the first area of the volatile storage of the memory device.

18 . The method according to claim 17 , wherein evicting the fourth data at the address in the first area of the volatile storage of the memory device includes writing the fourth data to the non-volatile storage of the memory device.

19 . The method according to claim 15 , further comprising copying the third data from the first area of the volatile storage of the memory device into the non-volatile storage of the memory device.

20 . The method according to claim 14 , wherein the memory device supports a first protocol and a second protocol.

Continuity (4)

References Cited (34)