Display device
A display device can include a display panel including sub-pixels and configured to switch between operating at a first frequency and operating at an N th frequency, the N th frequency being a maximum operating frequency of the display panel, N being a positive integer, a gate driver configured to output a scan signal to the display panel, and a data driver configured to output a data voltage to the display panel. Also, the display device can further include a timing controller configured to receive an external synchronization signal and image data, generate an internal synchronization signal within the timing controller, the internal synchronization signal having a frequency equal to the N th frequency, and in response to generating the internal synchronization signal during a holding period, output a gate start pulse to the gate driver and output the image data to the data driver.
1 . A display device comprising:
a display panel including sub-pixels and configured to switch between operating at a first frequency and operating at an N th frequency, the N th frequency being a maximum operating frequency of the display panel, N being a positive integer;
a gate driver configured to output a scan signal to the display panel;
a data driver configured to output a data voltage to the display panel; and
a timing controller configured to:
receive an external synchronization signal and image data,
generate an internal synchronization signal within the timing controller, the internal synchronization signal having a frequency equal to the N th frequency, and
in response to generating the internal synchronization signal during a holding period, output a gate start pulse to the gate driver and output the image data to the data driver.
2 . The display device of claim 1 , wherein the gate driver is further configured to output the scan signal in synchronization with the internal synchronization signal.
3 . The display device of claim 1 , wherein the data driver is further configured to convert the image data into the data voltage and output the data voltage in synchronization with the internal synchronization signal.
4 . The display device of claim 1 , wherein the internal synchronization signal has a same pulse width as a pulse width of the external synchronization signal.
5 . The display device of claim 1 , wherein the internal synchronization signal has a predetermined time delay from the external synchronization signal.
6 . The display device of claim 1 , wherein the external synchronization signal includes any one of a vertical synchronization signal, a horizontal synchronization signal, and a data enable signal.
7 . The display device of claim 1 , wherein the display panel is further configured to receive the scan signal and the data voltage during the holding period.
8 . The display device of claim 1 , wherein the sub-pixel includes a switching transistor, and the switching transistor is turned on during the holding period.
9 . The display device of claim 1 , wherein each of the sub-pixels includes a storage capacitor,
wherein the storage capacitor is configured to charge the data voltage during the holding period, and
wherein the holding period is a duration during which the image data is not received by the timing controller and the external synchronization signal is not received by the timing controller.
10 . The display device of claim 1 , wherein the timing controller is further configured to repeatedly output the image data to the data driver during the holding period.
11 . The display device of claim 1 , further comprising:
a first memory configured to store first image data during a first refresh period; and
a second memory configured to store second image data during a second refresh period,
wherein the second memory is configured to output the second image data to the data driver during the holding period following the second refresh period.
12 . The display device of claim 11 , wherein the first memory is further configured to store third image data during a third refresh period.
13 . The display device of claim 11 , wherein the first memory and the second memory alternately store the image data every refresh period.
14 . The display device of claim 11 , wherein the timing controller is further configured to write the image data into the first memory and the second memory in synchronization with the external synchronization signal.
15 . The display device of claim 11 , wherein the timing controller is further configured to read the image data from the first memory and the second memory in synchronization with the internal synchronization signal.
16 . The display device of claim 11 , wherein the holding period includes a plurality of consecutive holding frames, and
wherein the second image data output during each of the holding frames is stored in the second memory during the second refresh period.
17 . The display device of claim 11 , wherein the timing controller is further configured to:
perform writing into the second memory once during the second refresh period, and
performing reading from the second memory multiple times during the holding period.
18 . The display device of claim 1 , wherein the holding period includes a plurality of holding frames, and
wherein the data driver is further configured to perform real-time sensing of at least one of the sub-pixels during each of the plurality of holding frames.
19 . The display device of claim 1 , wherein the holding period includes a plurality of holding frames, and
wherein the data driver is further configured to output a plurality of sensing values during the holding period.