IP Library Granted Patent US 12,647,111
Granted Patent B2
US 12,647,111 · App. 18/763,431 · Granted Jun 2, 2026

Detection of leakage currents in intelligent semiconductor switch

Inventors: Christian Djelassi-Tscheck (Villach, AT); Mario Tripolt (Ferndorf, AT)
Assignee: Infineon Technologies AG
H03K17/165H03K17/223H03K17/302
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Quick Facts
Patent No.
US 12,647,111
App. No.
18/763,431
Granted
Jun 2, 2026
Kind
B2
Abstract

In accordance with an embodiment, a method includes activating a semiconductor switch coupled between a supply node and an output node to apply an output voltage to an electrical load coupled to the output node, wherein a supply voltage is provided to the supply node; and performing a leakage current test, comprising: deactivating the semiconductor switch to isolate the electrical load from the supply node; after deactivating the semiconductor switch, checking whether a time that elapses until the output voltage falls below a first voltage level is less than a threshold value; and activating the semiconductor switch after the checking.

Claims (49)

1 . A method comprising:

activating a semiconductor switch coupled between a supply node and an output node to apply an output voltage to an electrical load coupled to the output node, wherein a supply voltage is provided to the supply node; and

performing a leakage current test, comprising:

deactivating the semiconductor switch to isolate the electrical load from the supply node;

while the semiconductor switch is deactivated, checking whether a time that elapses from the deactivation of the semiconductor switch until the output voltage falls below a first voltage level is less than a threshold value; and

activating the semiconductor switch after the checking.

2 . The method as claimed in claim 1 , wherein checking whether the time is less than the threshold value comprises:

measuring the time that elapses until the output voltage falls below the first voltage level; and

comparing the measured time with the threshold value.

3 . The method as claimed in claim 1 , wherein the threshold value depends on a capacitance coupled to the output node or a maximum permissible leakage current.

4 . The method as claimed in claim 1 , wherein the semiconductor switch is activated and deactivated by a control circuit configured to operate in a normal mode and in an idle mode, wherein, in the idle mode, a load current flowing through the semiconductor switch to the output node is less than a current threshold value.

5 . The method as claimed in claim 4 , wherein the leakage current test is carried out while the control circuit is operating in the idle mode.

6 . The method as claimed in claim 1 , wherein the leakage current test is performed in response to receiving a diagnostic command.

7 . The method as claimed in claim 6 , wherein:

the diagnostic command is received via a digital communication interface; or

the diagnostic command is a level change in a logic signal that is received at a diagnostic input.

8 . The method as claimed in claim 6 , further comprising:

outputting a current pulse or a voltage pulse at a diagnostic output, wherein a length of the current pulse or the voltage pulse corresponds to the time that elapses until the output voltage falls below the first voltage level.

9 . A smart semiconductor switch comprising:

a transistor connected between a supply node and an output node; and

a control circuit configured to switch the transistor on and off, and configured to perform a leakage current test comprising:

switching the transistor off;

while the transistor is switched off, checking whether a time that elapses from the switching off of the transistor until an output voltage present at the output node falls below a first voltage level is less than a threshold value; and

switching the transistor on after the checking.

10 . The smart semiconductor switch as claimed in claim 9 , wherein the control circuit is further configured to:

generate a diagnostic signal comprising a pulse with a pulse length that corresponds to the time that elapses until the output voltage present at the output node falls below the first voltage level.

11 . The smart semiconductor switch as claimed in claim 9 , further comprising:

a circuit node configured to receive a logic signal through the control circuit, wherein a diagnostic command is signaled by the logic signal assuming a predefined level.

12 . The smart semiconductor switch as claimed in claim 9 , further comprising:

a digital communication interface configured to receive a diagnostic command.

13 . The smart semiconductor switch as claimed in claim 12 , wherein a maximum permissible leakage current depends on a bias current.

14 . The smart semiconductor switch as claimed in claim 9 , further comprising:

a current source coupled to the output node and configured to provide a bias current at the output node that is overlaid on a load current flowing through the transistor.

15 . A circuit comprising:

a transistor connected between a supply node and an output node;

a control circuit configured to switch the transistor on and off; and

a controller coupled to the control circuit and configured to perform a leakage current test comprising:

switching the transistor off using the control circuit;

while the transistor is switched off, checking whether a time that elapses from the switching off of the transistor until an output voltage at the output node falls below a first voltage level is less than a threshold value; and

switching the transistor on after the checking.

16 . The circuit as claimed in claim 15 , wherein the controller is configured to signal an excessively high leakage current in response to a result of the checking indicating that the time that elapses is shorter than the threshold value.

17 . The circuit as claimed in claim 15 , wherein the controller is configured to generate a first logic signal for the control circuit, wherein the first logic signal is configured to cause the control circuit to switch the transistor on and off.

18 . The circuit as claimed in claim 15 , wherein:

the controller is configured to generate a second logic signal for the control circuit; and

the second logic signal is configured to cause the control circuit to output a diagnostic signal that depends on a load current flowing through the transistor.

19 . The circuit as claimed in claim 15 , wherein:

the control circuit is configured to operate in a normal mode and in an idle mode; and

in the idle mode, a load current output at the output node is configured to be less than a current threshold value.

20 . The circuit as claimed in claim 19 , wherein the leakage current test is performed during the idle mode and in response to a diagnostic command.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 8, 2024
From: DJELASSI-TSCHECK, CHRISTIAN; TRIPOLT, MARIO
To: INFINEON TECHNOLOGIES AG
Reel/Frame 067926/0964 →
Priority Claims (1)
DE 102023118031.2 · Jul 7, 2023 · national
Continuity (1)
Related Publication 20250015796A1 · Jan 9, 2025
References Cited (2)
US 20100156426A1 · Kang et al. · 2010 [cited by applicant]
DE 102019121794A1 · 2021 [cited by applicant]