IP Library Granted Patent US 12,651,203
Granted Patent B2
US 12,651,203 · App. 17/460,698 · Granted Jun 9, 2026

System and method for training teacher model based on structure of student model

Inventors: Daeyoung Park (Yongin-si, KR); Changwook Jeong (Hwaseong-si, KR); Moonhyun Cha (Yongin-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G06N20/20G06F18/214G06F18/2163G06N3/092
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Quick Facts
Patent No.
US 12,651,203
App. No.
17/460,698
Granted
Jun 9, 2026
Kind
B2
Abstract

A computer-implemented method of training a teacher model and a student model includes dividing the teacher model into a series of teacher blocks each comprising at least one layer; generating a first student branch receiving a first feature output from a first teacher block among the series of teacher blocks; training the teacher model based on outputs of the teacher model and the first student branch; and training the student model comprising a series of student blocks based on the trained teacher model, wherein the first student branch includes at least one student block.

Claims (66)

1 . A training system comprising:

a memory storing instructions; and

at least one processor configured to access the memory and execute the instructions to:

divide a teacher model into a plurality of teacher blocks each comprising a plurality of layers, the plurality of teacher blocks comprising a first teacher block, a second teacher block and a third teacher block;

generate a first student branch, which receives a first feature output from the first teacher block, the first student branch comprising a first student branch block corresponding to the second teacher block and a second student branch block corresponding to the third teacher block;

train the teacher model based on one or more outputs of the teacher model and a first output of the first student branch by inputting images of a design pattern or a physical pattern of an integrated circuit as training data;

train a student model comprising a plurality of student blocks based on the trained teacher model by inputting images of the design pattern or the physical pattern of the integrated circuit as training data, the plurality of student blocks comprising a first student block corresponding to the first teacher block, a second student block corresponding to the second teacher block and a third student block corresponding to the third teacher block; and

model a semiconductor process based on the trained student model,

wherein the first student branch is generated separately from the plurality of student blocks of the student model, and

wherein the first student branch has a structure that replicates the student model by configuring the first student branch block to have a same number of layers, a same number of parameters, a same size of feature, and a same bitwidth as the first student block and configuring the second student branch block to have a same number of layer, a same number of parameters, a same size of feature, and a same bitwidth as the third student block,

wherein the first student branch comprises a first artificial neural network,

wherein the student model comprises a second artificial neural network,

wherein each of the plurality of student blocks of the student model has a lower complexity than a corresponding teacher block, among the plurality of teacher blocks in the teacher model or requires fewer resources than the corresponding teacher block in the teacher model,

wherein the first student branch comprises a transformation layer configured to transform the first feature output from the first teacher block into a first student branch feature having a format processible by the first student block, and

wherein the first output of the first student branch is a result that is partially processed by each of the teacher model and the student model represented by the first student branch.

2 . The training system of claim 1 , wherein a number of student blocks included in the first student branch is same as a number of teacher blocks following the first teacher block among the plurality of teacher blocks, and

wherein the plurality of teacher blocks is in a series.

3 . The training system of claim 2 , wherein the second teacher block follows the first teacher block among the plurality of teacher blocks.

4 . The training system of claim 1 , wherein the at least one processor is further configured to execute the instructions to:

generate a second student branch, which receives a second feature output from the second teacher block among the plurality of teacher blocks; and

train the teacher model based on the one or more outputs of the teacher model, the first output of the first student branch, and a second output of the second student branch,

wherein the second student branch corresponds to at least one second student block among the plurality of student blocks.

5 . A computer-implemented training method comprising:

dividing a teacher model into a plurality of teacher blocks each comprising a plurality of layers, the plurality of teacher blocks comprising a first teacher block, a second teacher block and a third teacher block;

generating a first student branch, which receives a first feature output from the first teacher block, the first student branch comprising a first student branch block corresponding to the second teacher block and a second student branch block corresponding to the third teacher block;

training the teacher model based on outputs of the teacher model and a first output of the first student branch by inputting images of a design pattern or a physical pattern of an integrated circuit as training data;

training a student model comprising a plurality of student blocks based on the trained teacher model by inputting images of the design pattern or the physical pattern of the integrated circuit as training data, the plurality of student blocks comprising a first student block corresponding to the first teacher block, a second student block corresponding to the second teacher block and a third student block corresponding to the third teacher block; and

modeling a semiconductor process based on the trained student model,

wherein the first student branch is generated separately from the plurality of student blocks of the student model, and

wherein the first student branch has a structure that replicates the student model by configuring the first student branch block to have a same number of layers, a same number of parameters, a same size of feature, and a same bitwidth as the first student block and configuring the second student branch block to have a same number of layer, a same number of parameters, a same size of feature, and a same bitwidth as the third student block,

wherein the first student branch comprises a first artificial neural network,

wherein the student model comprises a second artificial neural network,

wherein each of the plurality of student blocks of the student model has a lower complexity than a corresponding teacher block, among the plurality of teacher blocks in the teacher model or requires fewer resources than the corresponding teacher block in the teacher model,

wherein the first student branch comprises a transformation layer configured to transform the first feature output from the first teacher block into a first student branch feature having a format processible by the first student block, and

wherein the first output of the first student branch is a result that is partially processed by each of the teacher model and the student model represented by the first student branch.

6 . The computer-implemented method of claim 5 , wherein a number of student blocks included in the first student branch is same as a number of teacher blocks following the first teacher block among the plurality of teacher blocks, and

wherein the plurality of teacher blocks is in a series.

7 . The computer-implemented method of claim 6 , wherein the second teacher block follows the first teacher block among the plurality of teacher blocks.

8 . The computer-implemented method of claim 5 , further comprising:

generating a second student branch, which receives a second feature output from the second teacher block among the plurality of teacher blocks,

wherein the training of the teacher model is based on one or more outputs of the teacher model, the first output of the first student branch, and a second output of the second student branch, and

wherein the second student branch corresponds to at least one second student block among the plurality of student blocks.

9 . The computer-implemented method of claim 8 , wherein a number of blocks included in the second student branch is different from a number of blocks included in the first student branch.

10 . The computer-implemented method of claim 5 , wherein the training of the teacher model comprises calculating a first loss function based on a difference between one or more outputs of the teacher model and label data.

11 . The computer-implemented method of claim 5 , wherein the training of the teacher model comprises calculating a second loss function based on a difference between one or more outputs of the teacher model and the first output of the first student branch.

12 . The computer-implemented method of claim 5 , wherein the training of the teacher model comprises calculating a third loss function based on a difference between the first output of the first student branch and label data.

13 . A non-transitory computer-readable storage medium comprising instructions executable by at least one processor, wherein the instructions cause the at least one processor to perform operations of model training comprising:

dividing a teacher model into a plurality of teacher blocks each comprising a plurality of layers, the plurality of teacher blocks comprising a first teacher block, a second teacher block and a third teacher block;

generating a first student branch, which receives a first feature output from the first teacher block, the first student branch comprising a first student branch block corresponding to the second teacher block and a second student branch block corresponding to the third teacher block;

training the teacher model based on outputs of the teacher model and a first output of the first student branch by inputting images of a design pattern or a physical pattern of an integrated circuit as training data; and

training a student model comprising a plurality of student blocks based on the trained teacher model by inputting images of the design pattern or the physical pattern of the integrated circuit as training data, the plurality of student blocks comprising a first student block corresponding to the first teacher block, a second student block corresponding to the second teacher block and a third student block corresponding to the third teacher block; and

modeling a semiconductor process based on the trained student model,

wherein the first student branch is generated separately from the plurality of student blocks of the student model, and

wherein the first student branch has a structure that replicates the student model by configuring the first student branch block to have a same number of layers, a same number of parameters, a same size of feature, and a same bitwidth as the first student block and configuring the second student branch block to have a same number of layer, a same number of parameters, a same size of feature, and a same bitwidth as the third student block,

wherein the first student branch comprises a first artificial neural network,

wherein the student model comprises a second artificial neural network,

wherein each of the plurality of student blocks of the student model has a lower complexity than a corresponding teacher block, among the plurality of teacher blocks in the teacher model or requires fewer resources than the corresponding teacher block in the teacher model,

wherein the first student branch comprises a transformation layer configured to transform the first feature output from the first teacher block into a first student branch feature having a format processible by the first student block, and

wherein the first output of the first student branch is a result that is partially processed by each of the teacher model and the student model represented by the first student branch.

14 . The non-transitory computer-readable storage medium of claim 13 , wherein a number of student blocks included in the first student branch is same as a number of teacher blocks following the first teacher block among the plurality of teacher blocks, and

wherein the plurality of teacher blocks is in a series.

15 . The non-transitory computer-readable storage medium of claim 14 , wherein the second teacher block follows the first teacher block among the plurality of teacher blocks.

16 . The non-transitory computer-readable storage medium of claim 13 , wherein the operations of training the teacher model and the student model further comprise:

generating a second student branch, which receives a second feature output from the second teacher block among the plurality of teacher blocks,

wherein the training of the teacher model is based on one or more outputs of the teacher model, the first output of the first student branch, and a second output of the second student branch, and

wherein the second student branch corresponds to at least one second student block among the plurality of student blocks.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 30, 2021
From: PARK, DAEYOUNG; JEONG, CHANGWOOK; CHA, MOONHYUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 057328/0041 →
Priority Claims (1)
KR 10-2020-0189861 · Dec 31, 2020 · national
Continuity (1)
Related Publication 20220207431A1 · Jun 30, 2022
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