Pixel circuit and display device including same
A pixel circuit includes a first circuit and a second circuit, in which the second circuit includes a first transistor including a gate electrode connected to a third node, a first electrode connected to the first node, and a second electrode connected to the second node, a second transistor including a gate electrode connected to the third node, a first electrode connected to the second node, and a second electrode configured to receive the first supply voltage, a third transistor including a gate electrode configured to receive a first gate signal, a first electrode configured to receive a selection signal, and a second electrode connected to the third node, and a first capacitor including a first electrode configured to receive a second supply voltage and a second electrode connected to the third node.
1 . A pixel circuit comprising:
a first circuit comprising a first light-emitting element, a second light-emitting element, one or more transistors comprising a driving transistor, and one or more capacitors; and
a second circuit comprising a first transistor, a second transistor, a third transistor, and a first capacitor,
wherein the first light-emitting element comprises a first electrode connected to the driving transistor at a first node and a second electrode connected to a second node,
the second light-emitting element comprises a first electrode connected to the second node and a second electrode configured to receive a first supply voltage, and
the second circuit comprises:
the first transistor comprising a gate electrode connected to a third node, a first electrode connected to the first node, and a second electrode connected to the second node;
the second transistor comprising a gate electrode connected to the third node, a first electrode connected to the second node, and a second electrode configured to receive the first supply voltage;
the third transistor comprising a gate electrode configured to receive a first gate signal, a first electrode configured to receive a selection signal, and a second electrode connected to the third node; and
the first capacitor comprising a first electrode configured to receive a second supply voltage and a second electrode connected to the third node.
2 . The pixel circuit of claim 1 , wherein the third transistor is configured to transfer the selection signal to at least one of the first transistor and the second transistor based on being turned on.
3 . The pixel circuit of claim 1 , wherein of the first transistor and the second transistor, at least a first one is a P-channel metal oxide semiconductor (PMOS) transistor, and at least a second one is an N-channel metal oxide semiconductor (NMOS) transistor.
4 . The pixel circuit of claim 1 , wherein the first capacitor is configured to receive the selection signal based on the third transistor being turned on and to store the selection signal for a single frame.
5 . The pixel circuit of claim 1 , wherein the first light-emitting element is configured to emit light based on the first transistor being turned off.
6 . The pixel circuit of claim 1 , wherein the second light-emitting element is configured to emit light based on the second transistor being turned off.
7 . The pixel circuit of claim 1 , wherein the third transistor is configured to receive the selection signal from a same line as a data signal.
8 . The pixel circuit of claim 7 , wherein the third transistor is configured to receive the selection signal before the data signal.
9 . The pixel circuit of claim 7 , wherein the third transistor is configured to be turned off based on the first gate signal when receiving the data signal.
10 . The pixel circuit of claim 9 , wherein a data write transistor is included in the first circuit, is configured to receive the data signal, and further includes a gate electrode configured to receive a second gate signal.
11 . A display device comprising:
a scan driver configured to transfer a plurality of scan signals to a plurality of scan lines;
a data driver configured to transfer a plurality of data signals to a plurality of data lines;
a display comprising a plurality of pixels each connected to a corresponding scan line of the plurality of scan lines and a corresponding data line of the plurality of data lines, and configured to display an image with each of the plurality of pixels being configured to emit light in accordance with a corresponding data signal; and
a controller configured to control the scan driver and the data driver, to generate the plurality of data signals, and to supply the plurality of data signals to the data driver,
wherein each of the plurality of pixels comprises:
a first circuit comprising a first light-emitting element, a second light-emitting element, one or more transistors comprising a driving transistor, and one or more capacitors; and
a second circuit comprising a first transistor, a second transistor, a third transistor, and a first capacitor,
wherein the first light-emitting element comprises a first electrode connected to the driving transistor at a first node and a second electrode connected to a second node,
the second light-emitting element comprises a first electrode connected to the second node and a second electrode configured to receive a first supply voltage, and
the second circuit comprises:
the first transistor comprising a gate electrode connected to a third node, a first electrode connected to the first node, and a second electrode connected to the second node;
the second transistor comprising a gate electrode connected to the third node, a first electrode connected to the second node, and a second electrode configured to receive the first supply voltage;
the third transistor comprising a gate electrode configured to receive a first gate signal, a first electrode configured to receive a selection signal, and a second electrode connected to the third node; and
a first capacitor comprising a first electrode configured to receive a second supply voltage and a second electrode connected to the third node.
12 . The display device of claim 11 , wherein the third transistor transfers the selection signal to at least one of the first transistor and the second transistor based on being turned on.
13 . The display device of claim 11 , wherein of the first transistor and the second transistor, at least a first one is a P-channel metal oxide semiconductor (PMOS) transistor, and at least a second one is an N-channel metal oxide semiconductor (NMOS) transistor.
14 . The display device of claim 11 , wherein the first capacitor is configured to receive the selection signal based on the third transistor being turned on and to store the selection signal for a single frame.
15 . The display device of claim 11 , wherein the first light-emitting element is configured to emit light based on the first transistor being turned off.
16 . The display device of claim 11 , wherein the second light-emitting element is configured to emit light based on the second transistor being turned off.
17 . The display device of claim 11 , wherein the third transistor is configured to receive the selection signal from a same line as a data signal.
18 . The display device of claim 17 , wherein the third transistor is configured to receive the selection signal before the data signal, and the third transistor is configured to be turned off based on the first gate signal when receiving the data signal.
19 . The display device of claim 18 , wherein a data write transistor is included in the first circuit, is configured to receive the data signal, and further includes a gate electrode configured to receive a second gate signal.
20 . An electronic device comprising:
a display device comprising:
a scan driver configured to transfer a plurality of scan signals to a plurality of scan lines;
a data driver configured to transfer a plurality of data signals to a plurality of data lines;
a display comprising a plurality of pixels each connected to a corresponding scan line of the plurality of scan lines and a corresponding data line of the plurality of data lines, and configured to display an image with each of the plurality of pixels being configured to emit light in accordance with a corresponding data signal; and
a controller configured to control the scan driver and the data driver, to generate the plurality of data signals, and to supply the plurality of data signals to the data driver,
wherein each of the plurality of pixels comprises:
a first circuit comprising a first light-emitting element, a second light-emitting element, one or more transistors comprising a driving transistor, and one or more capacitors; and
a second circuit comprising a first transistor, a second transistor, a third transistor, and a first capacitor,
wherein the first light-emitting element comprises a first electrode connected to the driving transistor at a first node and a second electrode connected to a second node,
the second light-emitting element comprises a first electrode connected to the second node and a second electrode configured to receive a first supply voltage, and
the second circuit comprises:
the first transistor comprising a gate electrode connected to a third node, a first electrode connected to the first node, and a second electrode connected to the second node;
the second transistor comprising a gate electrode connected to the third node, a first electrode connected to the second node, and a second electrode configured to receive the first supply voltage;
the third transistor comprising a gate electrode configured to receive a first gate signal, a first electrode configured to receive a selection signal, and a second electrode connected to the third node; and
a first capacitor comprising a first electrode configured to receive a second supply voltage and a second electrode connected to the third node.