Image sensor with asynchronous sampling for improved frame rate
A method of operating an image sensor having a pixel array is provided. The method can include outputting a row control signal to a row of pixels in the pixel array at a first time, sampling a first output signal from a first pixel in the row of pixels at a second time, and sampling a second output signal from a second pixel in the row of pixels at a third time after the second time. The row control signal can arrive at the first pixel in the row of pixels a first row propagation delay after the first time. The row control signal can arrive at the second pixel in the row of pixels a second row propagation delay after the first time. The difference between the second and third times may be equal to the difference between the first and second row propagation delays.
1 . A method of operating an image sensor having a pixel array, the method comprising:
with a row driver circuit, outputting a row control signal to a row of pixels in the pixel array at a first time;
with a first sampling circuit, sampling a first output signal from a first pixel in the row of pixels at a second time, wherein the first output signal settles on a first column line within a first column path settling time and is sampled at the second time after the first output signal has settled on the first column line; and
with a second sampling circuit, sampling a second output signal from a second pixel in the row of pixels at a third time after the second time.
2 . The method of claim 1 , further comprising:
receiving the row control signal at the first pixel in the row of pixels a first row propagation delay after the first time; and
receiving the row control signal at the second pixel in the row of pixels a second row propagation delay after the first time, wherein a difference between the third time and the second time is equal to a difference between the second row propagation delay and the first row propagation delay.
3 . The method of claim 1 , wherein the second output signal from the second pixel in the row of pixels settles on a second column line within a second column path settling time, the method further comprising:
with the row driver circuit, outputting an additional row control signal to the row of pixels in the pixel array before the second output signal has settled on the second column line.
4 . The method of claim 3 , wherein:
outputting the row control signal comprises outputting a reset control signal to the row of pixels in the pixel array; and
outputting the additional row control signal comprises outputting a charge transfer signal to the row of pixels in the pixel array.
5 . The method of claim 4 , further comprising:
after sampling of the first output signal, converting to the first output signal to a first digital code; and
after sampling the second output signal, converting the second output signal to a second digital code.
6 . The method of claim 1 , further comprising:
with the first sampling circuit, sampling one or more additional output signals from one or more additional pixels in the row of pixels at the second time.
7 . The method of claim 1 , further comprising:
with a timing row of pixels having identical structure as the row of pixels, outputting a trigger signal to the first sampling circuit.
8 . An image sensor comprising:
an array of pixels;
a plurality of row driver circuits configured to output row control signals to corresponding rows of pixels in the array;
a reference row of pixels;
asynchronous sampling circuitry having a plurality of sampling circuits, wherein each sampling circuit in the plurality of sampling circuits comprises a first input coupled to a column of pixels in the array and a second input coupled to the reference row of pixels;
an additional row driver circuit configured to output row control signals to the reference row of pixels; and
a delay circuit coupled between the plurality of row driver circuits and the additional row driver circuit.
9 . The image sensor of claim 8 , wherein the delay circuit is configured to provide a delay amount equal to a column path settling time, and wherein a signal output from a given pixel in the array settles on a column line coupled to the given pixel within the column path settling time.
10 . The image sensor of claim 8 , further comprising:
an additional reference row of pixels disposed adjacent to the reference row of pixels.
11 . The image sensor of claim 10 , further comprising:
a logic gate having a first input coupled to a first pixel in the reference row of pixels, a second input coupled to a second pixel in the additional reference row of pixels, and an output coupled to one of the plurality of sampling circuits.
12 . The image sensor of claim 11 , wherein the logic gate comprises a logic OR gate.
13 . The image sensor of claim 8 , further comprising:
an additional plurality of row driver circuits configured to output row control signals to corresponding rows of pixels in the array, wherein the plurality of row driver circuits are disposed along a first edge of the array, and wherein the additional plurality of row driver circuits are disposed along a second edge of the array;
the additional row driver circuit is disposed along the first edge of the array;
a second additional row driver circuit disposed along the second edge of the array and configured to output row control signals to the reference row of pixels;
and
a second delay circuit coupled between the additional plurality of row driver circuits and the second additional row driver circuit.
14 . The image sensor of claim 8 , wherein the first input of each sampling circuit in the plurality of sampling circuits is coupled to multiple columns of pixels in the array.
15 . An image sensor comprising:
an array of pixels;
a first row driver circuit configured to output row control signals to a row of pixels in the array;
a timing row of pixels disposed along an edge of the array of pixels;
a second row driver circuit configured to output row control signals to the timing row of pixels; and
a delay circuit coupled between the first row driver circuit and the second row driver circuit.
16 . The image sensor of claim 15 , further comprising:
an additional timing row of pixels disposed adjacent to the timing row of pixels, wherein the timing row of pixels is configured to generate a trigger signal for sampling reset values from the array of pixels, and wherein the additional timing row of pixels is configured to generate a trigger signal for sampling signal values from the array of pixels.
17 . The image sensor of claim 16 , further comprising:
asynchronous sampling circuitry having a plurality of sampling circuits, wherein each sampling circuit in the plurality of sampling circuits has a first input coupled to a respective column of pixels in the array and has a second input configured to receive a first signal from a first pixel in the timing row of pixels or to receive a second signal from a second pixel in the additional timing row of pixels.
18 . The image sensor of claim 17 , wherein the first input of each sampling circuit in the plurality of sampling circuits is coupled to multiple columns of pixels in the array.