Semiconductor device
View Patent ↗According to one embodiment, a semiconductor device includes first to third electrodes, first to third semiconductor regions and a gate electrode. The first semiconductor region is located on the first electrode and electrically connected with the first electrode. The second semiconductor region is located on the first semiconductor region. The third semiconductor region is located on the second semiconductor region. The gate electrode faces the second semiconductor region via a gate insulating layer. An upper part of the gate electrode includes first and second electrode portions. The first electrode portion faces the third semiconductor region via the gate insulating layer. The second electrode portion is arranged with the first electrode portion. The second electrode is located on the second and third semiconductor regions. The third electrode includes an interconnect part located on the second electrode portion and is separated from the second electrode.
1 . A semiconductor device, comprising:
a first electrode;
a first semiconductor region located on the first electrode and electrically connected with the first electrode, the first semiconductor region being of a first conductivity type;
a second semiconductor region located on the first semiconductor region, the second semiconductor region being of a second conductivity type;
a third semiconductor region located on the second semiconductor region, the third semiconductor region being of the first conductivity type;
a gate electrode aligned with the second semiconductor region in a second direction with a gate insulating layer interposed, the second direction being perpendicular to a first direction, the first direction being from the first electrode toward the first semiconductor region, an upper part of the gate electrode including two first electrode portions and a second electrode portion, the second electrode portion being positioned between the two first electrode portions in a third direction perpendicular to the first and second directions, one of the two first electrode portions being aligned with the third semiconductor region in the second direction with the gate insulating layer interposed, a length in the second direction of the second electrode portion being greater than a length in the second direction of each of the two first electrode portions and greater than a length in the second direction of a lower part of the gate electrode;
a second electrode located on the second and third semiconductor regions and electrically connected with the second and third semiconductor regions; and
a third electrode separated from the second electrode, the third electrode including an interconnect part located on the second electrode portion and electrically connected with the second electrode portion.
2 . The device according to claim 1 , wherein
the second electrode includes a connection part,
the connection part contacts the third semiconductor region and a portion of the second semiconductor region, and
the third semiconductor region is positioned between one of the two first electrode portions and the connection part in the second direction.
3 . The device according to claim 1 , further comprising:
a conductive part located in the first semiconductor region with an insulating part interposed,
the second electrode being electrically connected with the conductive part.
4 . The device according to claim 3 , wherein
the conductive part includes:
a first conductive portion facing the first semiconductor region via the insulating part in the second direction; and
a second conductive portion located on the first conductive portion and arranged with the gate electrode in a third direction perpendicular to the first and second directions,
a length in the second direction of the second conductive portion is greater than a length in the second direction of the first conductive portion, and
the second electrode contacts the second conductive portion.
5 . The device according to claim 1 , wherein
the gate electrode is one of a plurality of gate electrodes arranged in the second direction,
each gate electrode of the plurality comprises a second electrode portion, and
the interconnect part is positioned on a plurality of the second electrode portions formed by the plurality of gate electrodes.
6 . The device according to claim 1 , wherein
the third semiconductor region is one of two third semiconductor regions provided on the second semiconductor region, and
the two first electrode portions are respectively aligned with the two third semiconductor regions with the gate insulating layer interposed.
7 . The device according to claim 5 , wherein
a distance in the second direction between adjacent second electrode portions is less than a distance in the second direction between adjacent first electrode portions.
8 . The device according to claim 7 , wherein
the distance in the second direction between the adjacent second electrode portions is less than a distance in the second direction between adjacent lower parts of adjacent gate electrodes.
9 . The device according to claim 1 , wherein
the second electrode portion is one of two second electrode portions, and
the two first electrode portions and the two second electrode portions are alternately arranged in the third direction.
10 . The device according to claim 9 , wherein
the interconnect part is one of two interconnect parts arranged in the third direction, and
the two interconnect parts are respectively positioned on the two second electrode portions.
11 . The device according to claim 1 , wherein
the length in the second direction of the second electrode portion is not less than 1.1 times the length in the second direction of one of the two first electrode portions or the length in the second direction of the lower part of the gate electrode.
12 . The device according to claim 1 , wherein
a difference between the length in the second direction of the second electrode portion and the length in the second direction of one of the two first electrode portions is greater than a difference between the length in the second direction of the second electrode portion and the length in the second direction of the lower part of the gate electrode.