GOA circuit and display panel
View Patent ↗The present disclosure relates to a GOA circuit and a display panel. The GOA circuit includes a plurality of cascaded GOA units, wherein each GOA unit includes a pull-up module, an inverter module, a pull-down module, and an output module. The pull-up module includes a first thin-film transistor and a second thin-film transistor. The first thin-film transistor is connected to a pull-up signal. The second thin-film transistor is connected to a pull-down node. The inverter module includes a seventh thin-film transistor. The seventh thin-film transistor is connected to a pull-up node. The pull-down module includes an eighth thin-film transistor and a ninth thin-film transistor. The eighth thin-film transistor and the ninth thin-film transistor are respectively connected to the pull-down node. In the output module, the gate of each thin-film transistor is connected to the pull-up node.
1 . A GOA circuit, comprising a plurality of cascaded GOA units, wherein each GOA unit comprises:
a pull-up module comprising a first thin-film transistor and a second thin-film transistor, wherein a gate of the first thin-film transistor is connected to a pull-up signal, one terminal of the first thin-film transistor is connected to a pull-down node, the other terminal of the first thin-film transistor is connected to a first low-potential signal, a gate of the second thin-film transistor is connected to a first node, one terminal of the second thin-film transistor is directly connected to a high-potential signal, and the other terminal of the second thin-film transistor is directly connected to the pull-down node;
an inverter module comprising a seventh thin-film transistor, wherein a gate of the seventh thin-film transistor is connected to a second node, one terminal of the seventh thin-film transistor is directly connected to the high-potential signal, the other terminal of the seventh thin-film transistor is directly connected to a pull-up node;
a pull-down module comprising an eighth thin-film transistor and a ninth thin-film transistor, wherein a gate of the eighth thin-film transistor and a gate of the ninth thin-film transistor are respectively connected to the pull-down node, one terminal of the eighth thin-film transistor is connected to the first low-potential signal, the other terminal of the eighth thin-film transistor is connected to one terminal of the ninth thin-film transistor, and the other terminal of the ninth thin-film transistor is connected to the pull-up node; and
an output module, wherein in the output module the gate of each thin-film transistor is connected to the pull-up node;
wherein, in a pull-up stage, the first thin-film transistor is turned on, the second thin-film transistor is turned off, so that the pull-down node is connected to the first low-potential signal, to cause the eighth thin-film transistor and the ninth thin-film transistor to be turned off, and in the pull-up stage, the seventh thin-film transistor is turned on, so that the high-potential signal is transmitted via the seventh thin-film transistor to the pull-up node; and in a pull-down stage, the first thin-film transistor is turned off, the second thin-film transistor is turned on, and the seventh thin-film transistor is turned off, so that the high-potential signal is transmitted via the second thin-film transistor to the pull-down node, to cause the eighth thin-film transistor and the ninth thin-film transistor to be turned on and cause the pull-up node to be connected to the first low-potential signal.
2 . The GOA circuit of claim 1 , wherein the pull-up module further comprises a third thin-film transistor and a fourth thin-film transistor, a gate of the third thin-film transistor is connected to the pull-up signal, one terminal of the third thin-film transistor is connected to the first node, the other terminal of the third thin-film transistor is connected to the first low-potential signal, a gate of the fourth thin-film transistor is connected to a pull-down signal, one terminal of the fourth thin-film transistor is connected to the high-potential signal, and the other terminal of the fourth thin-film transistor is connected to the first node.
3 . The GOA circuit of claim 2 , wherein the pull-up module further comprises a first capacitor, one terminal of the first capacitor is connected to the high-potential signal, and the other terminal of the first capacitor is connected to the first node.
4 . The GOA circuit of claim 3 , wherein the inverter module further comprises a fifth thin-film transistor and a sixth thin-film transistor, a gate of the fifth thin-film transistor is connected to the high-potential signal, one terminal of the fifth thin-film transistor is connected to the second node, the other terminal of the fifth thin-film transistor is connected to the high-potential signal, a gate of the sixth thin-film transistor is connected to the pull-down node, one terminal of the sixth thin-film transistor is connected to the first low-potential signal, and the other terminal of the sixth thin-film transistor is connected to the second node.
5 . The GOA circuit of claim 4 , wherein the pull-down module further comprises a tenth thin-film transistor and an eleventh thin-film transistor, a gate of the tenth thin-film transistor is connected to the pull-down node, one terminal of the tenth thin-film transistor is connected to a second low-potential signal, the other terminal of the tenth thin-film transistor is connected to an output terminal of a scan signal, a gate of the eleventh thin-film transistor is connected to the pull-down node, one terminal of the eleventh thin-film transistor is connected to the first low-potential signal, and the other terminal of the eleventh thin-film transistor is connected to an output terminal of a cascade transmission signal.
6 . The GOA circuit of claim 5 , wherein the output module comprises a twelfth thin-film transistor, a thirteenth thin-film transistor, and a second capacitor, a gate of the twelfth thin-film transistor is connected to the pull-up node, one terminal of the twelfth thin-film transistor is connected to the output terminal of the cascade transmission signal, the other terminal of the twelfth thin-film transistor is connected to a first pulse signal, a gate of the thirteenth thin-film transistor is connected to the pull-up node, one terminal of the thirteenth thin-film transistor is connected to the output terminal of the scan signal, the other terminal of the thirteenth thin-film transistor is connected to a second pulse signal, one terminal of the second capacitor is connected to the gate of the thirteenth thin-film transistor, and the other terminal of the second capacitor is connected to one terminal of the thirteenth thin-film transistor.
7 . The GOA circuit of claim 6 , wherein operating stages of the GOA circuit comprise a pull-up stage, an output stage, a pull-down stage, and a pull-down maintenance stage, wherein in the pull-up stage, the pull-up signal is at a high-potential, the pull-down signal is at a low-potential, the first thin-film transistor and the third thin-film transistor are turned on, the first node is connected to the first low-potential signal, the second thin-film transistor is turned off, the pull-down node is connected to the first low-potential signal, the sixth thin-film transistor is turned off, the second node is connected to the high-potential signal, the seventh thin-film transistor is turned on, and the pull-up node is connected to the high-potential signal.
8 . The GOA circuit of claim 7 , wherein in the output stage, the pull-up node is connected to the high-potential signal, the twelfth thin-film transistor and the thirteenth thin-film transistor are turned on, the twelfth thin-film transistor is connected to the first pulse signal and outputs the first pulse signal, the thirteenth thin-film transistor is connected to the second pulse signal and outputs the second pulse signal.
9 . The GOA circuit of claim 8 , wherein in the pull-down stage, the pull-down signal is at a high-potential, the pull-up signal is at a low-potential, the fourth thin-film transistor is turned on, the first node is connected to the high-potential signal, the second thin-film transistor is turned on, the pull-down node is connected to the high-potential signal, the sixth thin-film transistor is turned on, the seventh thin-film transistor is turned off, the eighth thin-film transistor, the ninth thin-film transistor, the tenth thin-film transistor, and the eleventh thin-film transistor are turned on, the pull-up node is connected to the first low-potential signal; in the pull-down maintenance stage, the pull-down signal is at a low-potential, the pull-up signal is at a low-potential, and the pull-down node maintains at a high potential.
10 . A display panel, comprising a display panel, wherein the display panel comprises a GOA circuit comprising a plurality of cascaded GOA units, each GOA unit comprises:
a pull-up module comprising a first thin-film transistor, and a second thin-film transistor, wherein a gate of the first thin-film transistor is connected to a pull-up signal, one terminal of the first thin-film transistor is connected to a pull-down node, the other terminal of the first thin-film transistor is connected to a first low-potential signal, a gate of the second thin-film transistor is connected to a first node, one terminal of the second thin-film transistor is directly connected to a high-potential signal, and the other terminal of the second thin-film transistor is directly connected to the pull-down node;
an inverter module comprising a seventh thin-film transistor, wherein a gate of the seventh thin-film transistor is connected to a second node, one terminal of the seventh thin-film transistor is directly connected to the high-potential signal, the other terminal of the seventh thin-film transistor is directly connected to a pull-up node;
a pull-down module comprising an eighth thin-film transistor and a ninth thin-film transistor, wherein a gate of the eighth thin-film transistor and a gate of the ninth thin-film transistor are respectively connected to the pull-down node, one terminal of the eighth thin-film transistor is connected to the first low-potential signal, the other terminal of the eighth thin-film transistor is connected to one terminal of the ninth thin-film transistor, and the other terminal of the ninth thin-film transistor is connected to the pull-up node; and
an output module, wherein in the output module the gate of each thin-film transistor is connected to the pull-up node;
wherein, in a pull-up stage, the first thin-film transistor is turned on, the second thin-film transistor is turned off, so that the pull-down node is connected to the first low-potential signal, to cause the eighth thin-film transistor and the ninth thin-film transistor to be turned off, and in the pull-up stage, the seventh thin-film transistor is turned on, so that the high-potential signal is transmitted via the seventh thin-film transistor to the pull-up node; and in a pull-down stage, the first thin-film transistor is turned off, the second thin-film transistor is turned on, and the seventh thin-film transistor is turned off, so that the high-potential signal is transmitted via the second thin-film transistor to the pull-down node, to cause the eighth thin-film transistor and the ninth thin-film transistor to be turned on and cause the pull-up node to be connected to the first low-potential signal.