Advanced quantum processor architecture
One-dimensional and two-dimensional arrays of qubits are disclosed. The one-dimensional array includes two or more double-quantum dots embedded in silicon, the two or more double-quantum dots arranged in an Echelon formation, such that the distance between the two or more double-quantum dots is approximately 40 nm and the distance between the two quantum dots in each double-quantum dot is approximately 12 nm; two or more reservoirs to load electrons to the corresponding two or more double-quantum dots to form singlet-triplet qubits in each double-quantum dot; and two or more gates for controlling the formed singlet-triplet qubits. The two-dimensional array of qubits includes two or more layers of vertically-stacked one-dimensional arrays of qubits.
1 . A one-dimensional array of qubits comprising:
two or more double-quantum dots embedded in silicon, the two or more double-quantum dots arranged in two parallel arrays which are offset with respect to each other (Echelon formation), such that inter qubit coupling between the two or more double-quantum dots is approximately 5 GHz to 50 GHz;
two or more reservoirs to load electrons to the two or more double-quantum dots to form singlet-triplet qubits in each double-quantum dot; and
two or more gates for controlling the formed singlet-triplet qubits.
2 . The one-dimensional array of claim 1 , wherein the double-quantum dots are formed using phosphorus donor atoms patterned into a silicon substrate.
3 . The one-dimensional array of claim 1 , wherein the inter qubit coupling between the two or more double-quantum dots is approximately 30 GHz±20 GHz.
4 . The one-dimensional array of claim 1 , wherein an inter-dot tunnel coupling value between two quantum dots in each double-quantum dot is approximately 10.5 GHz±9.5 GHz.
5 . The one-dimensional array of claim 1 , wherein distance between the double-quantum dots and the two or more gates is approximately 45 nm±5 nm.
6 . The one-dimensional array of claim 1 , wherein distance between the double-quantum dots and the two or more reservoirs is approximately 17 nm±1 nm.
7 . The one-dimensional array of claim 1 , wherein each double quantum dot includes a 1P donor and a 2P donor in an asymmetric configuration and the two or more double-quantum dots are arranged parallel to an adjacent pair of qubits.
8 . The one-dimensional array of claim 1 , wherein an angle between two dots in each double-quantum dot is approximately 32±3 degrees.
9 . The one-dimensional array of claim 7 , wherein the 1P donor in each double quantum dot is positioned closer to a corresponding reservoir and the 2P donor in each double quantum dot is positioned away from the corresponding reservoir.
10 . A two-dimensional quantum information processor, comprising two or more layers of vertically stacked one-dimensional arrays of double-quantum dots, each one-dimensional layer being fabricated of silicon, each array further comprising:
two or more reservoirs to load electrons to the double-quantum dots to form singlet-triplet qubits in each double-quantum dot; and
two or more gates for controlling the formed singlet-triplet qubits.
11 . A two-dimensional quantum information processor comprising two or more layers of vertically stacked one-dimensional arrays of double-quantum-dots, each of the two or more layers of vertically stacked one-dimensional arrays of qubits comprising:
two or more double-quantum dots embedded in silicon, the two or more double-quantum dots arranged in two parallel arrays which are offset with respect to each other (Echelon formation), such that inter qubit coupling between the two or more double-quantum dots is approximately 5 GHz to 50 GHz;
two or more reservoirs to load electrons to the corresponding two or more double-quantum dots to form singlet-triplet qubits in each double-quantum dot; and
two or more gates for controlling the formed singlet-triplet qubits.
12 . The two-dimensional quantum information processor of claim 10 , wherein adjacent layers of the two or more layers are at a distance of approximately 35 nm±3 nm from each other.
13 . The two-dimensional quantum information processor of claim 10 , wherein adjacent layers of the two or more layers are horizontally offset from each other by approximately 5 nm±3 nm.
14 . The two-dimensional quantum information processor of claim 10 , wherein positions of the two or more reservoirs and the two or more gates are swapped on alternating layers.
15 . The two-dimensional quantum information processor of claim 11 , wherein adjacent layers of the two or more layers are at a distance of approximately 35 nm±3 nm from each other.
16 . The two-dimensional quantum information processor of claim 11 , wherein adjacent layers of the two or more layers are horizontally offset from each other by approximately 5 nm±3 nm.
17 . The two-dimensional quantum information processor of claim 11 , wherein positions of the two or more reservoirs and the two or more gates are swapped on alternating layers.
18 . The one-dimensional array of claim 1 , wherein the inter qubit coupling between the two or more double-quantum dots is approximately 39 GHz±4 GHz and an inter-dot tunnel coupling value between two quantum dots in each double-quantum dot is approximately 6.5 GHz±1 GHz.
19 . The one-dimensional array of claim 1 , wherein a distance between the two or more double-quantum dots is approximately 50 nm±20 nm.
20 . The one-dimensional array of claim 1 , wherein a distance between two quantum dots in each double-quantum dot is approximately 11.5 nm±3.5 nm.