IP Library › Granted Patent US 12,696,465
Granted Patent B2
US 12,696,465 · App. 18/238,586 · Granted Jul 28, 2026

Method and systems for forming device structures including high-k dielectric layers and related device structures

Inventors: Fu Tang (Gilbert, AZ); Eric James Shero (Phoenix, AZ)
Assignee: ASM IP Holding B.V.
H10D1/68C23C16/405C23C16/45527C23C16/56H10P14/69392H10P14/69395H10P14/69397H10P50/283
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Quick Facts
Patent No.
US 12,696,465
App. No.
18/238,586
Filed
Aug 28, 2023
Granted
Jul 28, 2026
Kind
B2
Art Unit
2818
USPC
438/396
Abstract

Methods for forming a device structure including a high-k dielectric layer are disclosed. An exemplary method includes using a first cyclical deposition process to deposit a dielectric layer on a substrate and using a second cyclical deposition process to deposit a capping layer directly on the dielectric layer. The methods also include thermally annealing the dielectric layer with the capping layer directly thereon to form a high-k dielectric layer. Exemplary device structures are disclosure, such as metal-insulator-metal capacitor structures.

Claims (19)

1 . A method of forming a device structure, the method comprising the steps of:

providing a substrate within a reaction chamber;

depositing a hafnium zirconium oxide layer on the substrate by performing one or more deposition super-cycles of a first cyclical deposition process;

depositing a capping layer directly on the hafnium zirconium oxide layer by performing one or more deposition super-cycles of a second cyclical deposition process;

thermally annealing the hafnium zirconium oxide layer with the capping layer directly thereon;

crystallizing at least a portion of the hafnium zirconium oxide layer thereby forming a hafnium zirconium oxide high-k dielectric layer;

selectively removing the capping layer; and

depositing a metallic layer on the hafnium zirconium oxide high-k dielectric layer.

2 . The method of claim 1 , wherein the hafnium zirconium oxide layer comprises a mixed metal oxide, a metal oxide laminate, or mixtures thereof.

3 . The method of claim 2 , wherein depositing the hafnium zirconium oxide layer further comprises depositing a hafnium zirconium oxide layer in an amorphous state with an average layer thickness of greater than zero and less than 4 nanometers (nm).

4 . The method of claim 1 , wherein the capping layer comprises a metal, or a metal oxide, and depositing the capping layer further comprises, depositing at least one of a lutetium oxide, a hafnium oxide, a magnesium oxide, a zirconium oxide, a niobium oxide, an indium oxide, and mixed oxides and metal oxide laminates thereof.

5 . The method of claim 4 , wherein the capping layer comprises a mixed metal oxide or a metal oxide laminate comprising hafnium, lutetium, and oxygen.

6 . The method of claim 5 , wherein depositing the capping layer further comprises depositing a hafnium lutetium oxide capping layer in an amorphous state with an average layer thickness of greater than zero and less than 8 nanometers (nm).

7 . The method of claim 1 , wherein thermally annealing the hafnium zirconium oxide layer further comprises, heating the hafnium zirconium oxide layer to a temperature between 300° C. and 1200° C.

8 . The method of claim 7 , wherein thermally annealing the hafnium zirconium oxide layer does not result in interdiffusion between the hafnium zirconium oxide layer and the capping layer.

9 . The method of claim 7 , wherein thermally annealing the hafnium zirconium oxide layer does not result in additional strain/stress in the hafnium zirconium oxide high-k dielectric layer.

10 . The method of claim 1 , wherein crystallizing at least a portion of the hafnium zirconium oxide layer further comprises, crystallizing at least a portion of the capping layer.

11 . The method of claim 10 , wherein the hafnium zirconium oxide high-k dielectric layer has a dielectric constant great than 30 with an average layer thickness of less than 4 nanometers (nm).

12 . The method of claim 1 , wherein selectively removing the capping layer further comprises, selectively etching the capping layer employing a hydrofluoric acid based etchant, an ammonia based etchant, or a hydrochloric acid and hydrogen peroxide based etchant.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2023
From: TANG, FU; SHERO, ERIC JAMES
To: ASM IP HOLDING B.V.
Reel/Frame 064853/0683 →
Continuity (2)
Provisional Application 63402837 · Aug 31, 2022
Related Publication 20240072104A1 · Feb 29, 2024
References Cited (7)
US 10204788B1 · Ye · 2019 [cited by examiner]
US 20140103472A1 · Kent · 2014 [cited by examiner]
US 20170162570A1 · Shih · 2017 [cited by examiner]
US 20180366330A1 · Hegde · 2018 [cited by examiner]
US 20210243902A1 · Nakabayashi · 2021 [cited by examiner]
US 20230080212A1 · Connor · 2023 [cited by examiner]
Hedge et al., Hafnium zirconate gate dielectric for advanced gate stack applications, 2007, Journal of Applied Physics, https://pubs.aip.org/aip/jap/article/101/7/074113/918748 (Year: 2007). [cited by examiner]