Granted Patent B2

US 12,724,510 · App. 19/110,870 · Granted Sep 1, 2026

Inventor: Hongqiang Luo (Beijing, CN)

Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd.; BOE Technology Group Co., Ltd.

G06F3/04164G06F3/0446G06F2203/04107

Abstract

Claims (106)

1 . A touch and display driver integration chip, having a first output region, the first output region comprising a first connection region, a second connection region and a third connection region arranged in sequence along a first direction and in a direction from a right end to a left end of the chip, the first direction being parallel to a length direction of the chip;

the chip comprising a plurality of first connection blocks, arranged in the first output region, wherein the plurality of first connection blocks are arranged in multiple columns, with a column direction intersecting the first direction, an included angle formed by the column direction and the first direction being greater than or equal to 60° and less than or equal to 90°, wherein

the plurality of first connection blocks comprise:

a plurality of first touch connection blocks, divided into two groups that are respectively arranged in the first connection region and the third connection region, wherein the first touch connection blocks are configured to output first touch signals; and

a plurality of data connection blocks, arranged in the second connection region, wherein the data connection blocks are configured to output data signals required for displaying an image;

wherein a number of the plurality of first touch connection blocks is P, P≥3; and the plurality of first touch connection blocks are numbered in sequence as a first touch connection block ( 1 ), a first touch connection block ( 2 ), . . . , a first touch connection block (P), and are configured to respectively output the first touch signals to P first touch channels of a display panel electrically connected to the chip, wherein the first touch connection block ( 1 ) to a first touch connection block (P−x) are arranged in the first connection region, 1≤x<x+1≤P; and along a direction from the right end of the chip to a center of the chip, serial numbers of first touch connection blocks in each row become larger in sequence and are of an arithmetic progression with a difference of N; a first touch connection block (P−x+1) to the first touch connection block (P) are arranged in the third connection region; and along a direction from the left end of the chip to the center of the chip, serial numbers of first touch connection blocks in each row become larger in sequence and are of an arithmetic progression with a difference of N; and each column of first touch connection blocks comprises N first touch connection blocks with consecutive serial numbers;

or

a number of the plurality of first touch connection blocks is N×P, P≥3, and the plurality of first touch connection blocks are arranged in N rows and P columns; and P first touch connection blocks in each row are numbered in sequence as a first touch connection block ( 1 ), a first touch connection block ( 2 ), . . . , a first touch connection block (P), wherein the first touch connection block ( 1 ) to a first touch connection block (P−x) are arranged in the first connection region, 1≤x<x+1≤P; and along a direction from the right end of the chip to a center of the chip, serial numbers of the first touch connection blocks become larger in sequence and are consecutive; a first touch connection block (P−x+1) to the first touch connection block (P) are arranged in the third connection region; and along a direction from the left end of the chip to the center of the chip, serial numbers of the first touch connection blocks become larger in sequence and are consecutive; and N first touch connection blocks in each column have a same serial number, and the P columns of first touch connection blocks are configured to respectively output the first touch signals to P first touch channels of a display panel electrically connected to the chip.

2 . The chip according to claim 1 , wherein the plurality of first connection blocks are arranged in N rows along the column direction, N≥3.

3 . The chip according to claim 1 , wherein the first output region further comprises a fourth connection region and a fifth connection region; and along the first direction, the fourth connection region and the fifth connection region are respectively located at both sides of the second connection region; and

the plurality of first connection blocks further comprise:

a plurality of second touch connection blocks, divided into two groups that are respectively arranged in the fourth connection region and the fifth connection region, wherein the second touch connection blocks are configured to output second touch signals.

4 . The chip according to claim 3 , wherein a number of the plurality of second touch connection blocks is Q, Q≥3; and the plurality of second touch connection blocks are numbered in sequence as a second touch connection block ( 1 ), a second touch connection block ( 2 ), . . . , a second touch connection block (Q), and are configured to respectively output the second touch signals to Q second touch channels of a display panel electrically connected to the chip, wherein

the second touch connection block ( 1 ) to a second touch connection block (Q−y) are arranged in the fourth connection region, 1≤y<y+1≤Q; and along a direction from the right end of the chip to a center of the chip, serial numbers of second touch connection blocks in each row become larger in sequence and are of an arithmetic progression with a difference of N;

a second touch connection block (Q−y+1) to the second touch connection block (Q) are arranged in the fifth connection region; and along a direction from the left end of the chip to the center of the chip, serial numbers of second touch connection blocks in each row become smaller in sequence and are of an arithmetic progression with a difference of N; and

each column of second touch connection blocks comprises N second touch connection blocks with consecutive serial numbers;

or

a number of the plurality of second touch connection blocks is N×Q, Q≥3, and the plurality of second touch connection blocks are arranged in N rows and Q columns; and Q second touch connection blocks in each row are numbered in sequence as a second touch connection block ( 1 ), a second touch connection block ( 2 ), . . . , a second touch connection block (Q), wherein

the second touch connection block ( 1 ) to a second touch connection block (Q−y) are arranged in the fourth connection region, 1≤y<y+1≤Q; and along a direction from the right end of the chip to a center of the chip, serial numbers of the second touch connection blocks become larger in sequence and are consecutive;

a second touch connection block (Q−y+1) to the second touch connection block (Q) are arranged in the fifth connection region; and along a direction from the left end of the chip to the center of the chip, serial numbers of the second touch connection blocks become smaller in sequence and are consecutive; and

N second touch connection blocks in each column have a same serial number, and the Q columns of second touch connection blocks are configured to respectively output the second touch signals to Q second touch channels of a display panel electrically connected to the chip.

5 . The chip according to claim 3 , wherein the plurality of first connection blocks further comprise:

a plurality of shielding connection blocks, located between first touch connection blocks and second touch connection blocks that are adjacent to each other, and the shielding connection blocks being configured to output shielding signals.

6 . The chip according to claim 5 , wherein the first connection region and the fourth connection region are provided therebetween with N shielding connection blocks of the shielding connection blocks, and the third connection region and the fifth connection region are provided therebetween with N shielding connection blocks of the shielding connection blocks; and

in each row of first connection blocks, a first touch connection block and a second touch connection block that are adjacent to each other are provided therebetween with one of the shielding connection blocks; wherein

the first output region further comprises a sixth connection region and a seventh connection region, the sixth connection region being located at a side of the first connection region away from the second connection region, and the seventh connection region being located at a side of the third connection region away from the second connection region;

the plurality of first connection blocks further comprise:

a plurality of display control connection blocks, divided into two groups that are respectively arranged in the sixth connection region and the seventh connection region, the display control connection blocks being configured to output display control signals required for driving an image display;

a plurality of initialization connection blocks, divided into two groups that are respectively arranged in the sixth connection region and the seventh connection region, the initialization connection blocks being configured to output initialization signals required for driving the image display, wherein display control connection blocks in the sixth connection region and display control connection blocks in the seventh connection region are both farther away from a center of the chip relative to the initialization connection blocks; and

a plurality of groups of dummy connection blocks, the dummy connection blocks being configured to output no signal, wherein the display control connection blocks and the initialization connection blocks are provided therebetween with one of the groups of dummy connection blocks, the initialization connection blocks and the first touch connection blocks are provided therebetween with one of the groups of dummy connection blocks, and the second touch connection blocks and the data connection blocks are provided therebetween with one of the groups of dummy connection blocks.

7 . The chip according to claim 1 , wherein the chip further comprises two second output regions respectively located at the left end and the right end of the chip;

the chip further comprises a plurality of second connection blocks, wherein the plurality of second connection blocks are divided into two groups that are respectively arranged in the two second output regions, and the second connection blocks are configured to output second touch signals, or configured to output no touch signal;

in a case where the chip comprises the plurality of second connection blocks and further comprises a plurality of second touch connection blocks, at least one of a second touch connection block and a second connection block is configured to output a second touch signal.

8 . The chip according to claim 7 , wherein a number of the plurality of second connection blocks is Q, Q≥3; and the plurality of second connection blocks are numbered in sequence as a second connection block ( 1 ), a second connection block ( 2 ), . . . , a second connection block (Q), and are configured to respectively output the second touch signals to Q second touch channels of a display panel electrically connected to the chip; and

the chip further has an input region, arranged opposite to the first output region, wherein

the second connection block ( 1 ) to a second connection block (Q−y) are arranged in a second output region at the right end of the chip, 1≤y<y+1≤Q; and along the second direction and in a direction from the first output region to the input region, serial numbers of second connection blocks in each column become larger in sequence and are of an arithmetic progression; and

a second connection block (Q−y+1) to the second connection block (Q) are arranged in a second output region at the left end of the chip; and along the second direction and in the direction from the first output region to the input region, serial numbers of second connection blocks in each column become smaller in sequence and are of an arithmetic progression.

9 . A display device, comprising the touch and display driver integration chip as described in claim 1 , and a display panel, wherein a display surface of the display panel comprises: a display region, a first frame region and a second frame region respectively located at two opposite sides of the display region in a first direction, a third frame region and a fourth frame region respectively located at two opposite sides of the display region in a second direction, and a first bonding region located at a non-display surface of the display panel opposite to the display surface, the first bonding region and the fourth frame region being arranged on a same side of the display panel; the first direction is perpendicular to the second direction; and the first bonding region comprises a first pin region, a second pin region and a third pin region arranged in sequence along the first direction and in a direction from the first frame region to the second frame region;

the display panel comprises:

a touch structure, arranged in the display region;

a plurality of first touch leads, connected to the touch structure, wherein the plurality of first touch leads are divided into two groups respectively leading from the first frame region and the second frame region, and respectively extending to the first pin region and the third pin region; and

a plurality of first pins, arranged in the first bonding region, wherein the plurality of first pins are arranged in multiple columns, with a column direction intersecting the first direction, an included angle formed by the column direction and the first direction being greater than or equal to 60° and less than or equal to 90°, wherein

the plurality of first pins comprise:

a plurality of first touch pins, divided into two groups that are respectively arranged in the first pin region and the third pin region, and are respectively connected to the two groups of first touch leads, wherein the first touch pins are configured to receive first touch signals and transmit the first touch signals to touch electrodes of the touch structure through the first touch leads; and

a plurality of data pins, arranged in the second pin region, wherein the data pins are configured to receive data signals required for displaying an image and transmit the data signals to pixels of the display panel; and

the plurality of first touch connection blocks of the chip are respectively connected to the plurality of first touch pins of the display panel, and the plurality of data connection blocks of the chip are respectively connected to the plurality of data pins of the display panel.

10 . A display panel, wherein a display surface of the display panel comprises: a display region, a first frame region and a second frame region respectively located at two opposite sides of the display region in a first direction, a third frame region and a fourth frame region respectively located at two opposite sides of the display region in a second direction, and a first bonding region located at a non-display surface of the display panel opposite to the display surface, the first bonding region and the fourth frame region being arranged on a same side of the display panel; the first direction is perpendicular to the second direction; and the first bonding region comprises a first pin region, a second pin region and a third pin region arranged in sequence along the first direction and in a direction from the first frame region to the second frame region;

the display panel comprises:

a touch structure, arranged in the display region;

a plurality of first touch leads, connected to the touch structure, wherein the plurality of first touch leads are divided into two groups respectively leading from the first frame region and the second frame region, and respectively extending to the first pin region and the third pin region; and

a plurality of first pins, arranged in the first bonding region, wherein the plurality of first pins are arranged in multiple columns, with a column direction intersecting the first direction, an included angle formed by the column direction and the first direction being greater than or equal to 60° and less than or equal to 90°, wherein

the plurality of first pins comprise:

a plurality of first touch pins, divided into two groups that are respectively arranged in the first pin region and the third pin region, and are respectively connected to the two groups of first touch leads, wherein the first touch pins are configured to receive first touch signals and transmit the first touch signals to touch electrodes of the touch structure through the first touch leads; and

a plurality of data pins, arranged in the second pin region, wherein the data pins are configured to receive data signals required for displaying an image and transmit the data signals to pixels of the display panel;

the display panel further comprises two second bonding regions, located at a side of the first bonding region away from the display region and arranged to be corresponding to both ends of the first bonding region, respectively; and

the display panel further comprises:

a plurality of third touch leads, connected to the touch structure, wherein the plurality of third touch leads lead from the third frame region, and are divided into two groups respectively passing through the first frame region and the second frame region, and respectively extending to the two second bonding regions; and

a plurality of second pins, divided into two groups that are respectively arranged in the two second bonding regions and respectively connected to the two groups of third touch leads, wherein the second pins are configured to receive second touch signals and transmit the second touch signals to touch electrodes of the touch structure through the third touch leads.

11 . The display panel according to claim 10 , wherein the plurality of first pins are arranged in N rows along the column direction, N≥3.

12 . The display panel according to claim 10 , wherein the first bonding region further comprises a fourth pin region and a fifth pin region; and along the first direction, the fourth pin region and the fifth pin region are respectively located at both sides of the second pin region;

the display panel further comprises:

a plurality of second touch leads, connected to the touch structure, wherein the plurality of second touch leads lead from the fourth frame region, and are divided into two groups respectively extending to the fourth pin region and the fifth pin region; and

the plurality of first pins further comprise:

a plurality of second touch pins, divided into two groups that are respectively arranged in the fourth pin region and the fifth pin region, and are respectively connected to the two groups of second touch leads, wherein the second touch pins are configured to receive second touch signals and transmit the second touch signals to touch electrodes of the touch structure through the second touch leads.

13 . The display panel according to claim 12 , wherein the touch structure comprises Q second touch channels arranged in parallel and at intervals along the first direction, Q≥3, with each second touch channel extending along the second direction; and a number of the plurality of second touch leads is Q, and the plurality of second touch leads are respectively connected to the Q second touch channels; and

a number of the plurality of second touch pins is Q, and the plurality of second touch pins are respectively connected to the Q second touch leads; and the Q second touch pins are numbered in sequence as a second touch pin ( 1 ), a second touch pin ( 2 ), . . . , a second touch pin (Q), wherein

the Q second touch leads are divided into multiple sub-groups, with each sub-group comprising N second touch leads positioned adjacent to each other; a column of second touch pins comprises N second touch pins, the N second touch leads of each sub-group are respectively connected to N second touch pins in one column, and serial numbers of N second touch pins in each column are consecutive;

the second touch pin ( 1 ) to a second touch pin (Q−y) are arranged in the fourth pin region, 1≤y<y+1≤Q; and along a direction from the first frame region to a reference midline, serial numbers of second touch pins in each row become larger in sequence and are of an arithmetic progression with a difference of N, the reference midline being a midline of the display panel along the second direction; and

a second touch pin (Q−y+1) to the second touch pin (Q) are arranged in the fifth pin region; and along a direction from the second frame region to the reference midline, serial numbers of second touch pins in each row become smaller in sequence and are of an arithmetic progression with a difference of N;

or

the touch structure comprises Q second touch channels arranged in parallel and at intervals along the first direction, Q≥3, with each second touch channel extending along the second direction; and a number of the plurality of second touch leads is Q, and the plurality of second touch leads are respectively connected to the Q second touch channels; and

a number of the plurality of second touch pins is N×Q, Q≥3, and the plurality of second touch pins are arranged in N rows and Q columns; Q second touch pins in each row are numbered in sequence as a second touch pin ( 1 ), a second touch pin ( 2 ), . . . , a second touch pin (Q); and N second touch pins in each column have a same serial number, and the Q columns of second touch pins are respectively connected to the Q second touch leads, wherein

the second touch pin ( 1 ) to a second touch pin (Q−y) are arranged in the fourth pin region, 1≤y<y+1≤Q; and along a direction from the first frame region to a reference midline, serial numbers of the second touch pins become larger in sequence and are consecutive, the reference midline being a midline of the display panel along the second direction; and

a second touch pin (Q−y+1) to the second touch pin (Q) are arranged in the fifth pin region; and along a direction from the second frame region to the reference midline, serial numbers of the second touch pins become smaller in sequence and are consecutive.

14 . The display panel according to claim 13 , wherein along a direction from the first frame region to the second frame region, the Q second touch channels are numbered in sequence as a second touch channel ( 1 ), a second touch channel ( 2 ), . . . , a second touch channel (Q); and

according to the serial numbers of the second touch channels correspondingly connected to the second touch leads, the Q second touch leads are numbered in sequence as a second touch lead ( 1 ), a second touch lead ( 2 ), . . . , a second touch lead (Q), wherein

the second touch lead ( 1 ) to a second touch lead (Q−y) lead from the fourth frame region; and in a region in proximity to a side of the first bonding region proximate to the display region, serial numbers of the second touch leads become larger in sequence along the direction from the first frame region to the reference midline; and

a second touch lead (Q−y+1) to the second touch lead (Q) lead from the fourth frame region; and in the region in proximity to the side of the first bonding region proximate to the display region, serial numbers of the second touch leads become smaller in sequence along the direction from the second frame region to the reference midline.

15 . The display panel according to claim 12 , wherein the display panel further comprises shielding lines, located between first touch leads and second touch leads that are adjacent to each other; and

the plurality of first pins further comprise a plurality of shielding pins, located between first touch pins and second touch pins that are adjacent to each other, wherein a shielding pin is connected to a shielding line.

16 . The display panel according to claim 10 , wherein the touch structure comprises P first touch channels arranged in parallel and at intervals along the second direction, P≥3, with each first touch channel extending along the first direction; and a number of the plurality of first touch leads is P, and the plurality of first touch leads are respectively connected to the P first touch channels; and

a number of the plurality of first touch pins is P, and the plurality of first touch pins are respectively connected to the P first touch leads; and the P first touch pins are numbered in sequence as a first touch pin ( 1 ), a first touch pin ( 2 ), . . . , a first touch pin (P), wherein

the P first touch leads are divided into multiple sub-groups, with each sub-group comprising N first touch leads positioned adjacent to each other; a column of first touch pins comprises N first touch pins, the N first touch leads of each sub-group are respectively connected to N first touch pins in one column, and serial numbers of N first touch pins in each column are consecutive;

the first touch pin ( 1 ) to a first touch pin (P−x) are arranged in the first pin region, 1≤x<x+1≤P; and along a direction from the first frame region to a reference midline, serial numbers of first touch pins in each row become larger in sequence and are of an arithmetic progression with a difference of N, the reference midline being a midline of the display panel along the second direction; and

a first touch pin (P−x+1) to the first touch pin (P) are arranged in the third pin region; and along a direction from the second frame region to the reference midline, serial numbers of first touch pins in each row become larger in sequence and are of an arithmetic progression with a difference of N;

or

the touch structure comprises P first touch channels arranged in parallel and at intervals along the second direction, P≥3, with each first touch channel extending along the first direction; and a number of the plurality of first touch leads is P, and the plurality of first touch leads are respectively connected to the P first touch channels; and

a number of the plurality of first touch pins is N×P, P≥3, and the plurality of first touch pins are arranged in N rows and P columns; P first touch pins in each row are numbered in sequence as a first touch pin ( 1 ), a first touch pin ( 2 ), . . . , a first touch pin (P); and N first touch pins in each column have a same serial number, and the P columns of first touch pins are respectively connected to the P first touch leads;

the first touch pin ( 1 ) to a first touch pin (P−x) are arranged in the first pin region, 1≤x<x+1≤P; and along a direction from the first frame region to a reference midline, serial numbers of the first touch pins become larger in sequence and are consecutive, the reference midline being a midline of the display panel along the second direction; and

a first touch pin (P−x+1) to the first touch pin (P) are arranged in the third pin region; and along a direction from the second frame region to the reference midline, serial numbers of the first touch pins become larger in sequence and are consecutive.

17 . The display panel according to claim 16 , wherein along a direction from the third frame region to the fourth frame region, the P first touch channels are numbered in sequence as a first touch channel ( 1 ), a first touch channel ( 2 ), . . . , a first touch channel (P); and

according to the serial numbers of the first touch channels correspondingly connected to the first touch leads, the P first touch leads are numbered in sequence as a first touch lead ( 1 ), a first touch lead ( 2 ), . . . , a first touch lead (P), wherein

the first touch lead ( 1 ) to a first touch lead (P−x) lead from the first frame region;

and in a region in proximity to a side of the first bonding region proximate to the display region, serial numbers of the first touch leads become larger in sequence along the direction from the first frame region to the reference midline; and

a first touch lead (P−x+1) to the first touch lead (P) lead from the second frame region; and in the region in proximity to the side of the first bonding region proximate to the display region, serial numbers of the first touch leads become larger in sequence along the direction from the second frame region to the reference midline.

18 . The display panel according to claim 10 , wherein the touch structure comprises Q second touch channels arranged in parallel and at intervals along the first direction, Q≥3, with each second touch channel extending along the second direction; and a number of the plurality of third touch leads is Q, and the plurality of third touch leads are respectively connected to the Q second touch channels; and

a number of the plurality of second pins is Q, and the plurality of second pins are respectively connected to the Q third touch leads, and the Q second pins are numbered in sequence as a second pin ( 1 ), a second pin ( 2 ), . . . , a second pin (Q), wherein

the two second bonding regions are respectively a second bonding region (A) and a second bonding region (B), the second bonding region (A) being located at a side of a reference midline proximate to the first frame region, and the second bonding region (B) being located at a side of the reference midline proximate to the second frame region, the reference midline being a midline of the display panel along the second direction;

the second pin ( 1 ) to a second pin (Q−y) are arranged in the second bonding region (A), 1≤y<y+1≤Q; and along the second direction and in a direction from the third frame region to the fourth frame region, serial numbers of second pins in each column become larger in sequence and are of an arithmetic progression; and

a second pin (Q−y+1) to the second pin (Q) are arranged in the second bonding region (B); and along the second direction and in the direction from the third frame region to the fourth frame region, serial numbers of second pins in each column become smaller in sequence and are of an arithmetic progression.

19 . The display panel according to claim 18 , wherein along a direction from the first frame region to the second frame region, the Q second touch channels are numbered in sequence as a second touch channel ( 1 ), a second touch channel ( 2 ), . . . , a second touch channel (Q); and

according to the serial numbers of the third touch channels correspondingly connected to the second touch leads, the Q third touch leads are numbered in sequence as a third touch lead ( 1 ), a third touch lead ( 2 ), . . . , a third touch lead (Q), wherein

the third touch lead ( 1 ) to a third touch lead (Q−y) lead from the third frame region and extend toward the first frame region; and in a region in proximity to a side of the second bonding region (A) away from the first bonding region, serial numbers of the third touch leads become smaller in sequence along the first direction and in the direction from the first frame region to the second frame region; and

a third touch lead (Q−y+1) to the third touch lead (Q) lead from the third frame region and extend toward the second frame region; and in a region in proximity to a side of the second bonding region (B) away from the first bonding region, serial numbers of the third touch leads become larger in sequence along the first direction and in a direction from the second frame region to the first frame region.

20 . The display panel according to claim 18 , wherein the display panel further comprises a plurality of fourth touch leads, connected to the touch structure; the plurality of fourth touch leads lead from the third frame region, and are divided into two groups respectively passing through the first frame region and the second frame region, and respectively extending to the fourth pin region and the fifth pin region, wherein

each fourth touch lead has one end connected to one of the second touch channels, and the other end connected to one column of second touch pins.

Assignments (1)

Priority Claims (1)

Continuity (1)

References Cited (12)