Serial-bus system with dynamic address table and method for controlling the same
A serial communication bus system with a dynamic address table and its control method allows the master device to detect the removal of slave devices from the serial communication bus using allocated addresses and a common initial address through interactive polling. Additionally, when new slave devices connect to the bus, they can be directly detected, and non-conflicting new addresses can be assigned, eliminating the need to reassign addresses for all connected slave devices, as required in the conventional approach.
1 . A serial communication bus system with an address table comprising:
a master device;
multiple slave devices using a common initial address, where each of said slave devices can be one of a connected device and a newly connected device; and
a serial communication bus, serving as a connection interface between said master device and said slave devices;
wherein said address table is initialized to contain multiple bits, each bit corresponding to a device address of one of said multiple slave devices, having a first logic state or a second logic state;
wherein said master device is configured for performing the steps of:
a polling through all available device addresses, and setting corresponding bit to said first logic state upon receiving an ACK message from a corresponding device address;
and repeatedly:
searching for bits with said first logic state in said address table;
looping through each one of said bits in said address table with said first logic state, and transmitting via said serial communication bus, data to a corresponding device address associated with said each one of said bits with said first logic state, and updating a corresponding bit of said each one of said bits to a second logic state if no ACK message is received from said corresponding device address; and
obtaining a first bit in said address table with said second logic state if no bits with said first logic state were found in said address table, transmitting an assigned device address corresponding to said first bit along with said common initial address using a broadcast address, and updating said first bit to said first logic state upon receiving an ACK message from a newly connected device.
2 . The serial communication bus system with an address table as claimed in claim 1 , wherein said serial communication bus is an I2C Inter-Integrated Circuit (I2C) bus.
3 . The serial communication bus system with an address table as claimed in claim 2 , wherein said address table contains the common initial address.
4 . The serial communication bus system with an address table as claimed in claim 3 , wherein said common initial address is a General Call address.
5 . The serial communication bus system with a dynamic an address table as claimed in claim 2 , wherein said address table has 128 bits.
6 . The serial communication bus system with an address table as claimed in claim 1 , wherein said first logic state is logic 1 (on), and said second logic state is logic 0 (off).
7 . The serial communication bus system with an address table as claimed in claim 1 , wherein a confirmation of slave device connection and corresponding address assignment is achieved through said acknowledgment (ACK) signal.
8 . A control method for a serial communication bus system with an address table, said serial communication bus system comprising a master device, multiple slave devices using a common initial address, and a serial communication bus connecting said master device and said slave devices, and said master device having said address table, said control method comprising the following steps:
(a) initializing said address table, said address table having multiple bits, each bit corresponding to one particular device address, polling through all available device addresses, and setting a corresponding bit to a first logic state upon receiving an ACK message from a corresponding device address;
(b) searching for bits with said first logic state in said address table;
(b1) looping through each one of said bits in said address table with said first logic state, and transmitting, by said master device via said serial communication bus, data to a corresponding device address associated with each one of said bits with said first logic state, and updating a corresponding bit of said each one of said bits to a second logic state if no ACK message is received from said corresponding device address;
(c) obtaining a first bit in said address table with said second logic state if no bits with said first logic state were found in said address table, and transmitting an assigned device address corresponding to said first bit along with said common initial address using a broadcast address, and updating said first bit to said first logic state upon receiving an ACK message from a newly connected device; and
(d) returning to step (b).
9 . The control method as claimed in claim 8 , wherein said serial communication bus is an I2C Inter-Integrated Circuit (I2C) bus.
10 . The control method as claimed in claim 9 , wherein said address table contains the common initial address.
11 . The control method as claimed in claim 10 , wherein said common initial address is a General Call address.
12 . The control method as claimed in claim 9 , wherein said address table has 128 bits.
13 . The control method as claimed in claim 8 , wherein said first logic state is logic 1 (on), and said second logic state is logic 0 (off).
14 . The control method as claimed in claim 8 , wherein a confirmation of slave device connection and corresponding address assignment in steps (b1) and (c) is achieved through said acknowledgment (ACK) signal.