IP Library › Granted Patent US 12,726,040
Granted Patent B2
US 12,726,040 · App. 18/455,807 · Granted Sep 1, 2026

Circuit device and electronic device

Inventors: Masaya Ninomiya (Matsumoto, JP); Katsumi Okina (Fujimi-machi, JP)
Assignee: SEIKO EPSON CORPORATION
H02J7/94H02J7/40
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Quick Facts
Patent No.
US 12,726,040
App. No.
18/455,807
Granted
Sep 1, 2026
Kind
B2
Abstract

A circuit device includes: a current source circuit; a first charging circuit; a second charging circuit; and a control circuit. The control circuit controls, when a current setting value is in a first current range, supply of a first charging current from the first charging circuit to a charging node. The control circuit controls, when the current setting value is in a second current range on a current side higher than the first current range, supply of a second charging current from the second charging circuit to the charging node. The control circuit sets both the first charging current and the second charging current to a non-supply state during a switching period between the first current mode and the second current mode.

Claims (50)

1 . A circuit device comprising:

a current source circuit;

a first charging circuit configured to supply, based on an output current of the current source circuit, a first charging current as a charging current to a charging node;

a second charging circuit configured to supply, based on the output current of the current source circuit, a second charging current, which is greater than the first charging current, as the charging current to the charging node; and

a control circuit, wherein

the control circuit

controls, when a current setting value for setting a current value of the charging current is in a first current range, a first current mode in which the first charging current having a current value indicated by the current setting value is supplied from the first charging circuit to the charging node,

controls, when the current setting value is in a second current range on a current side higher than the first current range, a second current mode in which the second charging current having a current value indicated by the current setting value is supplied from the second charging circuit to the charging node, and

sets both the first charging current and the second charging current to a non-supply state during a switching period between the first current mode and the second current mode.

2 . The circuit device according to claim 1 , wherein

the control circuit

outputs a first enable signal for controlling the first charging current to a supply state or the non-supply state and a second enable signal for controlling the second charging current to the supply state or the non-supply state, and

during the switching period, sets both the first charging current and the second charging current to the non-supply state by deactivating the first enable signal and the second enable signal.

3 . The circuit device according to claim 2 , wherein

the first charging circuit is controlled to be enabled or disabled based on the first enable signal, and supplies the first charging current to the charging node when enabled,

the second charging circuit is controlled to be enabled or disabled based on the second enable signal, and supplies the second charging current to the charging node when enabled, and

during the switching period, the control circuit disables the first charging circuit and the second charging circuit by deactivating the first enable signal and the second enable signal.

4 . The circuit device according to claim 2 , further comprising:

a first transistor which is controlled to be turned on or off based on the first enable signal, and configured to supply the output current from the current source circuit to the first charging circuit when turned on; and

a second transistor which is controlled to be turned on or off based on the second enable signal, and configured to supply the output current from the current source circuit to the second charging circuit when turned on, wherein

during the switching period, the control circuit turns off the first transistor and the second transistor by deactivating the first enable signal and the second enable signal.

5 . The circuit device according to claim 1 , wherein

the control circuit outputs, based on the current setting value, a current source control value for controlling the output current of the current source circuit to the current source circuit,

in the first current mode, the current source circuit supplies, as the output current to the first charging circuit, a first current having a current value indicated by the current source control value, and the first charging circuit supplies the first charging current by amplifying the first current with a first gain, and

in the second current mode, the current source circuit supplies, as the output current to the second charging circuit, a second current having a current value indicated by the current source control value, and the second charging circuit supplies the second charging current by amplifying the second current with a second gain greater than the first gain.

6 . The circuit device according to claim 5 , wherein

the current source circuit includes

first to n-th current sources whose output or non-output of first to n-th constant currents, having current values weighted in binary, is controlled based on first to n-th control bit signals of the current source control value, n being an integer of 2 or more,

in the first current mode, a first transistor that supplies, as the first current to the first charging circuit, a current from a current source selected, based on the first to n-th control bit signals, from the first to n-th current sources, and

in the second current mode, a second transistor that supplies, as the second current to the second charging circuit, a current from a current source selected, based on the first to n-th control bit signals, from the first to n-th current sources.

7 . The circuit device according to claim 6 , wherein

the control circuit sets, based on the current setting value, a first setting value for setting the current value of the first charging current and a second setting value for setting the current value of the second charging current, and

the control circuit

outputs, in the second current mode, (i+1)-th to (i+n)-th bit signals among bit signals of the second setting value as the first to n-th control bit signals, i being an integer of 1 or more, and

outputs, in the first current mode, (i+1−k)-th to (i−k+n)-th bit signals among bit signals of the first setting value as the first to n-th control bit signals, k being an integer of 1 or more and i or less.

8 . The circuit device according to claim 5 , wherein

the current source circuit includes

a first current source circuit including m current sources whose output or non-output of m constant currents, having current values weighted in binary, is controlled based on an m-bit first current source control value, m being an integer of 2 or more, and

a second current source circuit including n current sources whose output or non-output of n constant currents, having current values weighted in binary, is controlled based on an n-bit second current source control value, n being an integer of m or more,

the control circuit outputs the m-bit first current source control value and the n-bit second current source control value as the current source control value,

the first current source circuit supplies, as the first current to the first charging circuit, a current from a current source selected, based on the m-bit first current source control value, from the m current sources, and

the second current source circuit supplies, as the second current to the second charging circuit, a current from a current source selected, based on the n-bit second current source control value, from the n current sources.

9 . The circuit device according to claim 8 , wherein

the control circuit

sets, based on the current setting value, a first setting value for setting the current value of the first charging current and a second setting value for setting the current value of the second charging current, and

outputs (i+1)-th to (i+n)-th bit signals among bit signals of the second setting value as the n-bit second current source control value, i being an integer of 1 or more, and

outputs (i+1−k)-th to (i−k+m)-th bit signals among bit signals of the first setting value as the m-bit first current source control value, k being an integer of 1 or more and i or less, and m being an integer of 2 or more and n or less.

10 . An electronic device comprising:

the circuit device according to claim 1 ; and

a battery coupled to the charging node.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2023
From: NINOMIYA, MASAYA; OKINA, KATSUMI
To: SEIKO EPSON CORPORATION
Reel/Frame 064709/0171 →
Priority Claims (1)
JP 2022-135674 · Aug 29, 2022 · national
Continuity (1)
Related Publication 20240079898A1 · Mar 7, 2024
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