IP Library › Granted Patent US 12,726,147
Granted Patent B2
US 12,726,147 · App. 18/807,297 · Granted Sep 1, 2026

Motor driver

Inventors: Daisuke Fukuda (Kyoto, JP); Takuya Ishii (Osaka, JP); Shinichi Kuroshima (Kyoto, JP); Noriaki Emura (Osaka, JP)
Assignee: Nuvoton Technology Corporation Japan
H02P23/14
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Quick Facts
Patent No.
US 12,726,147
App. No.
18/807,297
Granted
Sep 1, 2026
Kind
B2
Abstract

A motor driver includes: a current detector that outputs a current signal corresponding to a motor current; a current comparison circuit that compares the current signal with a reference waveform signal; and a PWM circuit that outputs a first drive signal and a second drive signal. The first drive signal includes a first pulse that starts synchronously with a start of a reference pulse signal and ends after the pulse duration time has elapsed from a beginning of the reference pulse signal and when an absolute value of the current signal exceeds an absolute value of the reference waveform signal, and the second drive signal includes a second pulse that starts after the first pulse ends when the absolute value of the current signal exceeds the absolute value of the reference waveform signal within the pulse duration time.

Claims (33)

1 . A motor driver that drives a motor, the motor driver comprising:

a first series switch circuit that includes a first high-side switch element and a first low-side switch element;

a second series switch circuit that includes a second high-side switch element and a second low-side switch element, and is connected in parallel to the first series switch circuit;

a reference pulse generation circuit that generates, in a predetermined cycle, a reference pulse signal whose pulse duration time is greater than zero;

a current detector that outputs a current signal corresponding to a motor current that is a current flowing through the motor;

a reference waveform generation circuit that generates a reference waveform signal corresponding to a control target value of the motor current;

a current comparison circuit that compares the current signal with the reference waveform signal to generate a comparison signal; and

a pulse width modulation (PWM) circuit that outputs a first drive signal and a second drive signal in response to receiving the reference pulse signal, the reference waveform signal, and the comparison signal,

wherein the motor is connected between a first connection point and a second connection point, the first connection point being a point connecting the first high-side switch element and the first low-side switch element, the second connection point being a point connecting the second high-side switch element and the second low-side switch element,

the first drive signal includes a first pulse that starts synchronously with a start of the reference pulse signal and ends at a timing which is after the pulse duration time has elapsed from a beginning of the reference pulse signal and at which an absolute value of the current signal exceeds an absolute value of the reference waveform signal,

the second drive signal includes a second pulse that starts after the first pulse ends and lasts at least during a period until the absolute value of the current signal falls below the absolute value of the reference waveform signal, when the absolute value of the current signal exceeds the absolute value of the reference waveform signal within the pulse duration time, and

the PWM circuit:

outputs the first drive signal to the first series switch circuit and the second drive signal to the second series switch circuit in a first period during which the motor current flows mainly from the first connection point to the second connection point; and

outputs the second drive signal to the first series switch circuit and the first drive signal to the second series switch circuit in a second period during which the motor current flows mainly from the second connection point to the first connection point.

2 . The motor driver according to claim 1 ,

wherein the reference waveform signal includes a first reference waveform signal that periodically oscillates to be positive and negative with a reference amplitude, and a second reference waveform signal that periodically oscillates to be positive and negative with the reference amplitude in antiphase with respect to the first reference waveform signal,

the comparison signal includes a first comparison signal and a second comparison signal,

the current comparison circuit includes a first comparison circuit that compares the current signal with the first reference waveform signal to generate the first comparison signal, and a second comparison circuit that compares the current signal with the second reference waveform signal to generate the second comparison signal, and

the PWM circuit includes:

a first pulse output circuit that outputs a first reference pulse signal including a pulse outputted in the first period, in response to receiving the reference pulse signal;

a second pulse output circuit that outputs a second reference pulse signal including a pulse outputted in the second period, in response to receiving the reference pulse signal;

a first PWM circuit that outputs, to the first series switch circuit, the first drive signal in the first period and the second drive signal in the second period, based on the first comparison signal, the second comparison signal, the first reference pulse signal, and the second reference pulse signal; and

a second PWM circuit that outputs, to the second series switch circuit, the second drive signal in the first period and the first drive signal in the second period, based on the first comparison signal, the second comparison signal, the first reference pulse signal, and the second reference pulse signal.

3 . The motor driver according to claim 1 ,

wherein the reference waveform generation circuit generates the reference waveform signal whose signal level is 0 or higher,

the PWM circuit includes:

a first switching circuit that outputs the first drive signal to the first series switch circuit in the first period and to the second series switch circuit in the second period; and

a second switching circuit that outputs the second drive signal to the second series switch circuit in the first period and to the first series switch circuit in the second period, and

the current comparison circuit equivalently compares the current signal with a signal obtained by reversing a polarity of the reference waveform signal to negative, when the second drive signal turns ON the first high-side switch element or the second high-side switch element.

4 . The motor driver according to claim 1 ,

wherein the reference waveform generation circuit outputs, to the PWM circuit, a polarity indication signal that controls a direction of the motor current.

5 . The motor driver according to claim 1 ,

wherein the second drive signal includes no pulse when the absolute value of the current signal does not exceed the absolute value of the reference waveform signal during the pulse duration time from the start of the reference pulse signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 20, 2024
From: FUKUDA, DAISUKE; ISHII, TAKUYA; KUROSHIMA, SHINICHI; EMURA, NORIAKI
To: NUVOTON TECHNOLOGY CORPORATION JAPAN
Reel/Frame 068335/0881 →
Priority Claims (1)
JP 2022-050627 · Mar 25, 2022 · national
Continuity (2)
Continuation PCTJP2023010992 · Mar 20, 2023
Related Publication 20240405706A1 · Dec 5, 2024
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