Method of forming a nano-FET semiconductor device having a spacer with a reducer seam
Embodiments include nanostructure devices and methods of forming nanostructure devices which include a treatment process to expand a sidewall spacer material to close a seam in the sidewall spacer material after deposition. The treatment process includes oxidation anneal and heat anneal to expand the sidewall spacer material and crosslink the open seam to form a closed seam, lower k-value, and decrease density.
1 . A device comprising:
a first nanostructure;
a second nanostructure over the first nanostructure;
a source/drain region adjacent the first nanostructure;
a gate structure surrounding the first nanostructure and the second nanostructure; and
a first inner spacer between the first nanostructure and the second nanostructure, the first inner spacer being between the gate structure and the source/drain region, the first inner spacer having oxidation on a first side of the first inner spacer, the first side of the first inner spacer contacting the source/drain region, the first inner spacer having a seam, wherein the seam comprises a first surface of the first inner spacer that is cross-linked to a second surface of the first inner spacer, wherein the seam is a closed seam that comprises a plurality of small gaps, wherein the oxidation has a gradient of concentration which continuously decreases laterally deeper into the first inner spacer from the first side of the first inner spacer.
2 . The device of claim 1 , wherein the oxidation has a lateral depth between 0 nm and 8 nm.
3 . The device of claim 1 , wherein a material composition of the first inner spacer comprises C at 0-10%, N at 0-20%, O at 30-60%, and Si at 25-40%, by molecular weight.
4 . The device of claim 3 , wherein a material composition of the first inner spacer immediately adjacent the gate structure comprises C at 5-15%, N at 10-30%, O at 10-55%, and Si at 30-45%, by molecular weight.
5 . The device of claim 1 , wherein the first side of the first inner spacer has a first curved sidewall, wherein a second side of the first inner spacer has a second curved sidewall, the second side opposite the first side, wherein the first curved sidewall is flatter than the second curved sidewall.
6 . The device of claim 1 , wherein the first inner spacer has a width between 5 nm and 15 nm.
7 . The device of claim 1 , wherein the first inner spacer has a uniform material composition.
8 . The device of claim 1 , wherein the first inner spacer comprises a first material throughout the first inner spacer.
9 . A transistor comprising:
a first nanostructure over a semiconductor substrate, the first nanostructure including a first end;
a second nanostructure over the first nanostructure, the second nanostructure including a second end;
a spacer between the first end and the second end;
a gate dielectric surrounding the first nanostructure and the second nanostructure, the gate dielectric having an interface with a first side of the spacer; and
a source/drain region adjacent the first end and the second end, the source/drain region having an interface with a second side of the spacer, the second side of the spacer opposite the first side, wherein the first side of the spacer has a first dishing profile, wherein the second side of the spacer has a second dishing profile, wherein the second dishing profile is less dished than the first dishing profile, wherein the spacer includes a seam and a plurality of gaps along the seam, wherein a first oxidation concentration has a concentration gradient which continuously decreases from the second side of the spacer toward the first side of the spacer.
10 . The transistor of claim 9 , wherein the first dishing profile is between 0.5 nm and 15 nm, and wherein the second dishing profile is between 0 nm and 5 nm.
11 . The transistor of claim 9 , wherein the spacer has the first oxidation concentration disposed at the second side of the spacer.
12 . The transistor of claim 11 , wherein the first oxidation concentration has a lateral depth from the second side of the spacer greater than 0 nm and less than about 8 nm.
13 . The transistor of claim 9 , wherein the spacer is a first material throughout the spacer.
14 . A transistor comprising:
a first nanostructure over a semiconductor substrate, the first nanostructure including a first end;
a second nanostructure over the first nanostructure, the second nanostructure including a second end;
a spacer between the first end and the second end;
a gate dielectric surrounding the first nanostructure and the second nanostructure, the gate dielectric having an interface with a first side of the spacer; and
a source/drain region adjacent the first end and the second end, the source/drain region having an interface with a second side of the spacer, the second side of the spacer opposite the first side, wherein the first side of the spacer has a first dishing profile, wherein the second side of the spacer has a second dishing profile different than the first dishing profile, wherein the second side of the spacer has a higher oxygen content than the first side of the spacer, wherein the spacer includes a cross-linked seam and gaps along the cross-linked seam, wherein the higher oxygen content at the second side of the spacer continuously decreases in a gradient from the second side toward the first side.
15 . The transistor of claim 14 , wherein the first side of the spacer has an oxygen concentration in a range of 10-55% by molecular weight.
16 . The transistor of claim 15 , wherein the second side of the spacer has an oxygen concentration in a range of 30-60% by molecular weight.
17 . The transistor of claim 16 , wherein the spacer comprises silicon carbonoxynitride.
18 . The transistor of claim 14 , wherein the first dishing profile is between 0.5 nm and 15 nm, and wherein the second dishing profile is between 0 nm and 5 nm.
19 . The transistor of claim 14 , wherein the spacer has a height between 0% and 20% greater than a thickness of the first nanostructure or the second nanostructure.
20 . The transistor of claim 14 , wherein the spacer comprises a single first material that extends from the second side to the first side.