Three-dimensional integrated circuit structures and method of forming the same

1 . A package, comprising:

a first die comprising a first device;

a second die comprising a second device and bonded to the first die; and

a device-free die located aside the second die and bonded to the first die, wherein the device-free die is electrically connected to the first die and the second die,

wherein from a top view, opposing edges of the device-free die are closer to opposing edges of the first die than are opposing edges of the second die, and an entire boundary of the device-free die and an entire boundary of the second die are both within a boundary of the first die.

2 . The package of claim 1 , wherein the second die is bonded to the first die through a metal-to-metal bonding and a dielectric-to-dielectric bonding.

3 . The package of claim 1 , wherein the device-free die is bonded to the first die through a metal-to-metal bonding and a dielectric-to-dielectric bonding.

4 . The package of claim 1 , wherein a semiconductor substrate of the second die is thinner than a semiconductor substrate of the device-free die.

5 . The package of claim 1 , wherein the first die has a first top area A 1 , the second die has a second top area A 2 , the device-free die has a third top area A 3 , and a ratio of (A 2 +A 3 ) to A 1 is 0.4 or more.

6 . The package of claim 1 , further comprising a dielectric encapsulation over the first die and around the second die and the device-free die.

7 . The package of claim 6 , further comprising a redistribution layer structure over the dielectric encapsulation and electrically connected to the second die and the device-free die.

8 . The package of claim 6 , further comprising a plurality of through dielectric vias located aside the second die and penetrating through the dielectric encapsulation.

9 . A method of forming a package, comprising:

providing a first die comprising a first device;

bonding a second die comprising a second device to the first die; and

bonding a device-free die to the first die, wherein the device-free die is electrically connected to the first die and the second die,

wherein from a top view, opposing edges of the device-free die are closer to opposing edges of the first die than are opposing edges of the second die, and a boundary of the device-free die and a boundary of the second die are both within a boundary of the first die.

10 . The method of claim 9 , wherein the second die is bonded to the first die through a metal-to-metal bonding and a dielectric-to-dielectric bonding.

11 . The method of claim 9 , wherein the device-free die is bonded to the first die through a metal-to-metal bonding and a dielectric-to-dielectric bonding.

12 . The method of claim 9 , wherein the first die has a first top area A 1 , the second die has a second top area A 2 , the device-free die has a third top area A 3 , and a ratio of (A 2 +A 3 ) to A 1 is 0.4 or more.

13 . The method of claim 9 , wherein a semiconductor substrate of the second die is thinner than a semiconductor substrate of the device-free die.

14 . The method of claim 9 , wherein an interconnect structure of the second die is thicker than an interconnect structure of the device-free die.

15 . The method of claim 9 , further comprising forming a dielectric encapsulation over the first die and around the second die and the device-free die.

16 . The method of claim 15 , further comprising forming through dielectric vias through the dielectric encapsulation and aside the second die.

17 . A method of forming a package, comprising:

providing a first device die that comprises a first semiconductor substrate and a first bonding structure;

providing a second device die that comprises a second semiconductor substrate, first through substrate vias and a second bonding structure, and bonding the second device die to the first device die by the second bonding structure and the first bonding structure;

providing a dummy die that comprises a third semiconductor substrate, second through substrate vias and a third bonding structure, and bonding the dummy die to the first device die by the third bonding structure and the first bonding structure; and

forming a redistribution layer structure over the second device die and the dummy die,

wherein from a top view, opposing edges of the dummy die are closer to opposing edges of the first device die than are opposing edges of the second device die, and an entire boundary of the dummy die and an entire boundary of the second device die are both within a boundary of the first device die.

18 . The method of claim 17 , wherein at least two of the first through substrate vias and at least two of the second through substrate vias are in contact with a same metal feature of the redistribution layer structure, and a height of the first through substrate vias is less than a height of the second through substrate vias.

19 . The method of claim 17 , wherein the second bonding structure and the third bonding structure are at substantially a same level.

20 . The method of claim 17 , further comprising forming a dielectric encapsulation over the first die and around the second die and the device-free die before forming the redistribution layer structure.