IP Library › Granted Patent US 12,733,326
Granted Patent B2
US 12,733,326 · App. 17/719,238 · Granted Sep 8, 2026

Display device

Inventors: Hae Yun Choi (Hwaseong-si, KR); Min Woo Kim (Hwaseong-si, KR); Jin Woo Choi (Seoul, KR)
Assignee: Samsung Display Co., Ltd.
H10H29/142H10H20/84H10W72/20
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,733,326
App. No.
17/719,238
Granted
Sep 8, 2026
Kind
B2
Abstract

A display device including: a substrate including pixel electrodes; a passivation layer on the substrate, a groove in the passivation layer between the pixel electrodes; contact electrodes on the pixel electrodes; and a light-emitting element layer comprising a plurality of light-emitting elements respectively bonded onto the contact electrodes and having a plurality of semiconductor layers thereon. The groove does not overlap the plurality of light-emitting elements.

Claims (53)

1 . A display device comprising:

a substrate comprising pixel electrodes;

a passivation layer on the substrate, a plurality of openings in the passivation layer respectively overlapping the pixel electrodes and a groove in the passivation layer between the openings and the pixel electrodes;

contact electrodes respectively on the pixel electrodes and extending upwardly onto and along a side surface of the passivation layer defining the opening in the passivation layer; and

a light-emitting element layer comprising a plurality of light-emitting elements respectively bonded onto the contact electrodes and having a plurality of semiconductor layers thereon,

wherein the groove does not overlap the plurality of light-emitting elements,

wherein the contact electrodes do not contact a bottom surface of the passivation layer connected to the side surface of the passivation layer.

2 . The display device of claim 1 , wherein the groove extends around a periphery of the plurality of light-emitting elements and is between the plurality of light-emitting elements.

3 . The display device of claim 1 , wherein the groove is between two adjacent ones of the contact electrodes, and

wherein a width of the groove is smaller than a distance between the two adjacent ones of the contact electrodes.

4 . The display device of claim 1 , wherein the passivation layer has openings exposing the pixel electrodes, and

wherein the groove is between the openings.

5 . The display device of claim 1 , wherein the groove has a mesh shape.

6 . The display device of claim 1 , wherein a length of the groove is smaller than or equal to a width of the plurality of light-emitting elements.

7 . The display device of claim 1 , wherein a depth of the groove is smaller than or equal to a thickness of the passivation layer.

8 . The display device of claim 1 , wherein the groove comprises a plurality of grooves, and

wherein the plurality of grooves comprises a first groove adjacent to the plurality of light-emitting elements and a second groove adjacent to the first groove.

9 . The display device of claim 8 , wherein a width and a depth of the first groove is greater than a width and a depth, respectively, of the second groove.

10 . The display device of claim 8 , wherein the second groove comprises a (2-1)th groove and a (2-2)th groove that are spaced apart from each other, and

wherein each of the (2-1)th groove and the (2-2)th groove overlaps the first groove in one direction on a plane.

11 . The display device of claim 10 , wherein the first groove comprises a (1-1)th groove and a (1-2)th groove that are spaced apart from each other, and

wherein each of the (1-1)th groove and the (1-2)th groove overlaps the (2-1)th groove in one direction on a plane.

12 . The display device of claim 8 , wherein the first groove extends around a periphery of one of the plurality of light-emitting elements,

wherein the second groove extends around a periphery of another one of the plurality of light-emitting elements, and

wherein the first groove and the second groove have a closed loop shape.

13 . A display device comprising:

a substrate comprising pixel electrodes;

a passivation layer on the substrate and having a groove between the pixel electrodes, the groove extending less than entirely through the passivation layer in a thickness direction of the passivation layer such that a bottom of the groove is formed by the passivation layer;

a contact electrode on the pixel electrode; and

a light emitting element layer comprising:

a plurality of light-emitting elements respectively bonded onto the contact electrodes and having a plurality of semiconductor layers thereon; and

a partition wall between the plurality of light-emitting elements,

wherein the partition wall is above the passivation layer,

wherein the groove overlaps the partition wall, and

wherein the partition wall is spaced apart from the bottom of the groove.

14 . The display device of claim 13 , wherein the partition wall protrudes toward the groove, and

wherein a width of the partition wall is smaller than that of the light-emitting elements.

15 . The display device of claim 13 , wherein the partition wall is in the groove.

16 . The display device of claim 13 , wherein a width of the partition wall is smaller than that of the groove.

17 . The display device of claim 13 , wherein the plurality of semiconductor layers of the light emitting element layer comprises a second semiconductor layer and a third semiconductor layer on the second semiconductor layer,

wherein each of the plurality of light-emitting elements comprises a first portion of a first semiconductor layer, a first portion of an active layer on the first portion of first semiconductor layer, a first portion of the second semiconductor layer on the first portion of the active layer, and a first portion of the third semiconductor layer on the first portion of the second semiconductor layer, and

wherein the partition wall comprises a second portion of the-first semiconductor layer, a second portion of the-active layer on the second portion of the first semiconductor layer, a second portion of the-second semiconductor layer on the second portion of the active layer, and a second portion of the-third semiconductor layer on the second portion of the second semiconductor layer.

18 . The display device of claim 17 , wherein the second semiconductor layer portion and the third semiconductor layer are common layers that are continuously in the plurality of light-emitting elements and the partition wall.

19 . The display device of claim 17 , further comprising a first insulating layer extending around a periphery of the first semiconductor layer, the active layer, the second semiconductor layer, and the third semiconductor layer,

wherein the first insulating layer exposes a portion of the first semiconductor layer of the plurality of light-emitting elements and covers the first semiconductor layer of the partition wall.

20 . An electronic device comprising:

a substrate having a first light emission area, a second light emission area, a third light emission area, and a fourth light emission area;

pixel electrodes on the substrate and overlapping each of the first light emission area, the second light emission area, the third light emission area, and the fourth light emission area;

a passivation layer on the substrate, the passivation layer having a groove between the pixel electrodes; and

a plurality of light-emitting elements respectively bonded to the pixel electrodes and having a plurality of semiconductor layers thereon,

wherein the groove extends around a periphery of the first light emission area, the second light emission area, the third light emission area and the fourth light emission area, and

wherein the groove does not overlap the first light emission area, the second light emission area, the third light emission area, and the fourth light emission area, and

wherein at least one of the plurality of semiconductor layers extends over the groove in a direction normal to the substrate without being in the groove.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2022
From: CHOI, HAE YUN; KIM, MIN WOO; CHOI, JIN WOO
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 059807/0804 →
Priority Claims (1)
KR 10-2021-0105352 · Aug 10, 2021 · national
Continuity (1)
Related Publication 20230052793A1 · Feb 16, 2023
References Cited (13)
US 6483236B1 · Hung · 2002 [cited by examiner]
US 8362694B2 · Hanawa · 2013 [cited by examiner]
US 11227905B2 · Kim et al. · 2022 [cited by applicant]
US 11610938B2 · Kim et al. · 2023 [cited by applicant]
US 12094920B2 · Kim et al. · 2024 [cited by applicant]
US 20020158835A1 · Kobayashi · 2002 [cited by examiner]
US 20040183436A1 · Ito · 2004 [cited by examiner]
US 20200127173A1 · Park et al. · 2020 [cited by applicant]
KR 20180118488A · 2018 [cited by applicant]
KR 20200049945A · 2020 [cited by applicant]
KR 1020200069729A · 2020 [cited by applicant]
KR 20200119444A · 2020 [cited by applicant]
KR 1020210054117A · 2021 [cited by applicant]