Technologies for trusted I/O with a channel identifier filter and processor-based cryptographic engine
Technologies for trusted I/O include a computing device having a processor, a channel identifier filter, and an I/O controller. The I/O controller may generate an I/O transaction that includes a channel identifier and a memory address. The channel identifier filter verifies that the memory address of the I/O transaction is within a processor reserved memory region associated with the channel identifier. The processor reserved memory region is not accessible to software executed by the computing device. The processor encrypts I/O data at the memory address in response to invocation of a processor feature and copies the encrypted data to a memory buffer outside of the processor reserved memory region. The processor may securely clean the processor reserved memory region before encrypting and copying the data. The processor may wrap and unwrap programming information for the channel identifier filter. Other embodiments are described and claimed.
1 . An apparatus comprising:
a memory controller; and
processor circuitry coupled to the memory controller, the processor circuitry to:
receive an unprivileged processor instruction with programming information, which is to have been generated by one or more unprivileged software components of a trusted execution environment, as a parameter, the programming information including a direct memory access (DMA) channel identifier and a channel key;
generate wrapped programming information based on the programming information in response to the unprivileged processor instruction, wherein the channel key is to be encrypted using a key-wrapping key to generate an encrypted channel key, wherein the wrapped programming information includes the encrypted channel key and the DMA channel identifier, wherein a trusted input/output (I/O) processor reserved memory region has a plurality of ranges including a first range characterized by a first base and a first size mapped to the DMA channel identifier and a second range characterized by a second base and a second size mapped to another DMA channel identifier, and wherein the processor reserved memory region is inaccessible to the one or more unprivileged software components; and
perform operations corresponding to a second instruction that is to indicate the wrapped programming information, including to decrypt the encrypted channel key to generate the channel key, program the channel key to a cryptographic unit of a processor core having the processor circuitry, and program the DMA channel identifier to a channel filter.
2 . The apparatus of claim 1 , wherein the unprivileged processor instruction is invoked using an unprivileged software component of the one or more unprivileged software components, and wherein the key-wrapping key is private to the processor circuitry.
3 . The apparatus of claim 1 , wherein the processor circuitry is further to assign, via a firmware environment, the trusted I/O processor reserved memory region.
4 . The apparatus of claim 1 , wherein the second instruction is a privileged instruction, and wherein the operations corresponding to the second instruction include to program the first range to the channel filter.
5 . The apparatus of claim 3 , wherein the processor circuitry is further to:
store a trusted I/O processor reserved memory region setting in a firmware variable in response to assignment of the trusted I/O processor reserved memory region; and
integrity-protect the firmware variable with a trusted platform module of a computing device.
6 . The apparatus of claim 4 , wherein the processor circuitry is further to:
invoke a third privileged processor instruction with the first range as a parameter; and
securely clear the first range in response to invocation of the third privileged processor instruction.
7 . The apparatus of claim 4 , wherein the processor circuitry is further to:
verify the wrapped programming information wherein to invoke the second privileged processor instruction comprises to invoke the second privileged processor instruction in response to verification of the wrapped programming information.
8 . The apparatus of claim 4 , wherein the processor circuitry is further to:
read a cryptographic response from the processor in response to invocation of the first second privileged processor instruction; and
prevent a privileged software component from accessing the first range associated with the DMA channel identifier, and wherein the privileged software component comprises a kernel mode driver.
9 . A method comprising:
receiving an unprivileged processor instruction with programming information, which is to have been generated by one or more unprivileged software components of a trusted execution environment, as a parameter, the programming information including a direct memory access (DMA) channel identifier and a channel key;
generating wrapped programming information based on the programming information in response to the unprivileged processor instruction, wherein the channel key is to be encrypted using a key-wrapping key to generate an encrypted channel key, wherein the wrapped programming information includes the encrypted channel key and the DMA channel identifier, wherein a trusted input/output (I/O) processor reserved memory region has a plurality of ranges including a first range characterized by a first base and a first size mapped to the DMA channel identifier and a second range characterized by a second base and a second size mapped to another DMA channel identifier, and wherein the processor reserved memory region is inaccessible to the one or more unprivileged software components; and
performing operations corresponding to a second instruction indicating the wrapped programming information, including decrypting the encrypted channel key to generate the channel key, programing the channel key to a cryptographic unit of a processor core that received the unprivileged processor instruction, and programing the DMA channel identifier into a channel filter.
10 . The method of claim 9 , and wherein the unprivileged processor instruction is invoked using an unprivileged software component of the one or more unprivileged software components, and wherein key-wrapping key is private to a processor that receives the unprivileged processor instruction.
11 . The method of claim 9 , further comprising assigning, via a firmware environment, the trusted I/O processor reserved memory region, wherein processor circuitry is further to establish a secure enclave.
12 . The method of claim 9 , wherein the second instruction is a privileged instruction, and wherein the operations corresponding to the second instruction include to program the first range to the channel filter.
13 . The method of claim 11 , further comprising:
storing a trusted I/O processor reserved memory region setting in a firmware variable in response to assignment of the trusted I/O processor reserved memory region; and
integrity-protecting the firmware variable with a trusted platform module of a computing device.
14 . The method of claim 12 , further comprising:
invoking a third privileged processor instruction with the first range as a parameter; and
securely clearing the first range in response to invocation of the third privileged processor instruction.
15 . The method of claim 12 , further comprising:
verifying the wrapped programming information, wherein to invoke the second privileged processor instruction comprises to invoke the second privileged processor instruction in response to verification of the wrapped programming information.
16 . The method of claim 12 , further comprising:
reading a cryptographic response from the processor in response to invocation of the first second privileged processor instruction; and
preventing a privileged software component from accessing the first range associated with the DMA channel identifier, and wherein the privileged software component comprises a kernel mode driver.
17 . At least one computer-readable medium having stored thereon instructions which, when executed, cause a computing device to perform operations including to:
generate programming information by one or more unprivileged software components of a trusted execution environment;
invoke an unprivileged processor instruction with the programming information as a parameter, the programming information including a direct memory access (DMA) channel identifier and a channel key;
generate wrapped programming information based on the programming information in response to the unprivileged processor instruction, wherein the channel key is to be encrypted using a key-wrapping key to generate an encrypted channel key, wherein the wrapped programming information includes the encrypted channel key and the DMA channel identifier, wherein a trusted input/output (I/O) processor reserved memory region has a plurality of ranges including a first range characterized by a first base and a first size mapped to the DMA channel identifier and a second range characterized by a second base and a second size mapped to another DMA channel identifier, and wherein the processor reserved memory region is inaccessible to the one or more unprivileged software components; and
perform operations corresponding to a second instruction that is to indicate the wrapped programming information, including to decrypt the encrypted channel key to generate the channel key, program the channel key to a cryptographic unit of a processor core that is to generate the wrapped programming information, and program the DMA channel identifier to a channel filter.
18 . The at least one computer-readable medium of claim 17 , wherein the unprivileged processor instruction is to be invoked using the unprivileged software component, and wherein key-wrapping key is private to a processor.
19 . The at least one computer-readable medium of claim 17 , wherein the operations further comprise to assign, via a firmware environment, the trusted I/O processor reserved memory region.
20 . The at least one computer-readable medium of claim 17 , wherein the second instruction is a privileged instruction, and wherein the operations corresponding to the second instruction include to program the first range to the channel filter.
21 . The at least one computer-readable medium of claim 19 , wherein the operations further include to:
store I/O processor reserved memory region setting in a firmware variable in response to assignment of the trusted I/O processor reserved memory region; and
integrity-protect the firmware variable with a trusted platform module of the computing device.
22 . The at least one computer-readable medium of claim 20 , wherein the operations further comprise:
invoking a third privileged processor feature instruction with the first range as a parameter; and
securely clearing the first range in response to invocation of the third privileged processor instruction.
23 . The at least one computer-readable medium of claim 20 , wherein the operations further comprise:
verifying the wrapped programming information, wherein to invoke the first second privileged processor instruction comprises to invoke the first second privileged processor instruction in response to verification of the wrapped programming information.
24 . The at least one computer-readable medium of claim 20 , wherein the operations further comprise:
reading a cryptographic response from the processor in response to invocation of the first privileged processor instruction; and
preventing the privileged software component from accessing the first range associated with the DMA channel identifier, and wherein the privileged software component comprises a kernel mode driver.