IP Library › Granted Patent US 12,737,962
Granted Patent B2
US 12,737,962 · App. 18/629,494 · Granted Sep 15, 2026

Identifying storage for ray tracing

Inventors: Sinh Le Hong Nguyen (Gothenburg, SE); Maximilian Rietmann (Zurich, CH)
Assignee: NVIDIA Corporation
G06T15/06
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Quick Facts
Patent No.
US 12,737,962
App. No.
18/629,494
Granted
Sep 15, 2026
Kind
B2
Abstract

Apparatuses, systems, and techniques to perform ray tracing. In at least one embodiment, ray tracing workload is estimated prior to ray tracing simulation based on, for example, less than all data associated with rays to be traced.

Claims (30)

1 . A processor, comprising:

one or more circuits to predict, prior to completion of a ray tracing operation identified by a user, a ray tracing workload corresponding to the ray tracing operation based, at least in part, on data from tracing one or more partial primary rays including an amount of data to compute one or more numbers of one or more types of secondary rays.

2 . The processor of claim 1 , wherein the ray tracing workload is to enable one or more rays resulting from the one or more ray tracing software programs being performed to be selected by a user.

3 . The processor of claim 1 , wherein the one or more circuits are to predict ray tracing workload prior to ray tracing based, at least in part, on less than all data associated with rays to be traced.

4 . The processor of claim 1 , wherein the ray tracing workload is computed based, at least in part, on information related to ray intersections in a virtual environment, the ray intersections comprising one or more of specular reflection, diffraction, refraction, and diffuse reflection.

5 . The processor of claim 1 , wherein the ray tracing workload is computed using less than all data associated with rays to be traced, wherein the less than all data is a minimum amount of data required to compute one or more numbers of one or more types of secondary rays of a primary ray.

6 . The processor of claim 1 , wherein the one or more circuits are to:

partition rays to be traced into two or more groups of rays based, at least in part, on the ray tracing workload and available memory space of one or more processing units; and

perform ray tracing of the two or more groups of rays using the one or more processing units.

7 . The processor of claim 1 , wherein the one or more circuits are to perform a partial ray tracing by tracing only one or more numbers and one or more types of secondary rays.

8 . A system, comprising:

one or more processors to predict, prior to completion of a ray tracing operation identified by a user, a ray tracing workload corresponding to the ray tracing operation based, at least in part, on data from tracing one or more partial primary rays including an amount of data to compute one or more numbers of one or more types of secondary rays.

9 . The system of claim 8 , wherein the ray tracing workload is to enable one or more rays resulting from the one or more ray tracing software programs being performed to be selected.

10 . The system of claim 8 , wherein the one or more processors are to predict the ray tracing workload prior to ray tracing based, at least in part, on less than all data associated with rays to be traced.

11 . The system of claim 8 , wherein the ray tracing workload is computed based, at least in part, on information related to ray intersections in a virtual environment, the ray intersections comprising one or more of specular reflection, diffraction, refraction, and diffuse reflection.

12 . The system of claim 8 , wherein the ray tracing workload is computed using less than all data associated with rays to be traced, wherein the less than all data is a minimum amount of data required to compute one or more numbers of one or more types of secondary rays of a primary ray.

13 . The system of claim 8 , wherein the one or more processors are to:

partition rays to be traced into two or more groups of rays based, at least in part, on ray tracing workload and available memory space of one or more processing units; and

perform ray tracing of the two or more groups of rays using the one or more processing units.

14 . The system of claim 8 , wherein the one or more ray tracing software programs are performed by two or more graphic processing units (GPUs) in parallel.

15 . A method, comprising:

using one or more circuits to predict, prior to completion of a ray tracing operation identified by a user, a ray tracing workload corresponding to the ray tracing operation based, at least in part, on data from tracing one or more partial primary rays including an amount of data to compute one or more numbers of one or more types of secondary rays.

16 . The method of claim 15 , wherein the ray tracing workload is to enable one or more rays resulting from the one or more ray tracing software programs being performed to be selected.

17 . The method of claim 15 , further comprising:

predicting ray tracing workload prior to ray tracing based, at least in part, on less than all data associated with rays to be traced.

18 . The method of claim 15 , wherein the ray tracing workload is computed based, at least in part, on information related to ray intersections in a virtual environment, the ray intersections comprising one or more of specular reflection, diffraction, refraction, and diffuse reflection.

19 . The method of claim 15 , wherein the ray tracing workload is computed using less than all data associated with rays to be traced, wherein the less than all data is a minimum amount of data required to compute one or more numbers of one or more types of secondary rays of a primary ray.

20 . The method of claim 15 , further comprising:

partitioning rays to be traced into two or more groups of rays based, at least in part, on ray tracing workload and available memory space of one or more processing units; and

performing ray tracing of the two or more groups of rays using the one or more processing units.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2024
From: NGUYEN, SINH LE HONG; RIETMANN, MAXIMILIAN
To: NVIDIA CORPORATION
Reel/Frame 067062/0683 →
Continuity (1)
Related Publication 20250316016A1 · Oct 9, 2025
References Cited (10)
US 20090262132A1 · Peterson · 2009 [cited by examiner]
US 20120133654A1 · Redgrave · 2012 [cited by examiner]
US 20190088002A1 · Howson · 2019 [cited by examiner]
US 20230298127A1 · Barczak · 2023 [cited by examiner]
US 20230298255A1 · Benthin · 2023 [cited by examiner]
US 20250173812A1 · Pankratz · 2025 [cited by examiner]
IEEE, “IEEE Standard 754-2008 (Revision of IEEE Standard 754-1985): IEEE Standard for Floating-Point Arithmetic,” Aug. 29, 2008, 70 pages. [cited by applicant]
Society of Automotive Engineers On-Road Automated Vehicle Standards Committee “Taxonomy and Definitions for Terms Related to Driving Automation Systems for On-Road Motor Vehicles”, Standard No. J3016-201806, dated Jun. … [cited by applicant]
Society of Automotive Engineers On-Road Automated Vehicle Standards Committee, “Taxonomy and Definitions for Terms Related to Driving Automation Systems for On-Road Motor Vehicles,” Standard No. J3016-201609, issued Jan… [cited by applicant]
Wikipedia, “IEEE 802.11,” Wikipedia the Free Encyclopedia, https://en.wikipedia.org/wiki/IEEE_802.11, most recent edit Sep. 20, 2020 [retrieved Sep. 22, 2020], 15 pages. [cited by applicant]