IP Library › Granted Patent US 12,744,536
Granted Patent B2
US 12,744,536 · App. 18/764,126 · Granted Sep 22, 2026

Systems, methods, and apparatus for controlling oscillator frequency response

Inventors: Jaehyup Kim (San Jose, CA); Joung Won Park (San Diego, CA); Dae Hyun Kang (San Jose, CA)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H03L7/099H03K3/0315H03L7/093H03L7/0995
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Quick Facts
Patent No.
US 12,744,536
App. No.
18/764,126
Granted
Sep 22, 2026
Kind
B2
Abstract

A method may include generating, using an oscillator, a first signal having a frequency based on a current, generating, based on a second signal, a first portion of the current, the first portion of the current having a first frequency characteristic, and generating, based on the second signal, a second portion of the current, the second portion of the current having a second frequency characteristic. A gain of the first frequency characteristic may change based on a frequency of the second signal. The first frequency characteristic may include a first gain at a first frequency, and a second gain at a second frequency. The first gain may be greater than the second gain, and the second frequency may be greater than the first frequency. A phase of the first frequency characteristic may change based on a frequency of the second signal.

Claims (52)

1 . A method comprising:

generating, using an oscillator, a first signal having a frequency based on a current;

generating, based on a second signal, a first portion of the current, the first portion of the current having a first frequency characteristic; and

generating, based on the second signal, a second portion of the current, the second portion of the current having a second frequency characteristic; and

controlling, using a calibration input circuit, a magnitude of at least one of the first portion of the current or the second portion of the current, wherein the calibration input circuit includes a differential circuit.

2 . The method of claim 1 further comprising:

controlling a frequency of the first signal by controlling an operating frequency of the oscillator; and

controlling, based on the frequency of the first signal, a gain of the first frequency characteristic.

3 . The method of claim 1 wherein the first frequency characteristic comprises:

a first gain at a first frequency of the first frequency characteristic; and

a second gain at a second frequency of the first frequency characteristic.

4 . The method of claim 3 wherein:

the first gain is greater than the second gain; and

the second frequency is greater than the first frequency.

5 . The method of claim 1 further comprising:

controlling a phase response of the first frequency characteristic as a function of frequency; and

controlling, based on the phase response of the first frequency characteristic, a gain of the first frequency characteristic.

6 . The method of claim 1 wherein the first frequency characteristic comprises:

a first phase shift at a first frequency; and

a second phase shift at a second frequency.

7 . The method of claim 6 wherein:

the first phase shift is in a first direction; and

the second phase shift is in a second direction.

8 . A circuit comprising:

an oscillator configured to generate a first signal having a frequency based on a current; and

a current generator configured to generate the current;

wherein the current generator comprises:

a first path configured to generate, based on a second signal, a first portion of the current, the first path having a first frequency characteristic; and

a second path configured to generate, based on the second signal, a second portion of the current, the second path having a second frequency characteristic;

and further comprising a calibration input circuit configured to control a contribution of at least one of the first portion of the current or the second portion of the current, wherein the calibration input circuit comprises a differential circuit.

9 . The circuit of claim 8 , wherein:

the first path comprises a first transistor configured to generate, based on the second signal, the first portion of the current; and

the second path comprises a second transistor configured to generate, based on the second signal, the second portion of the current.

10 . The circuit of claim 9 , wherein the second path comprises a filter configured to control, based on the second signal, the second transistor.

11 . The circuit of claim 1 , further comprising:

an input stage configured to generate a control signal based on a comparison of an input signal and a reference signal;

wherein the input stage comprises a differential pair of transistors and a current mirror load configured to:

(i) convert a differential output of the input stage to a single-ended current corresponding to the first portion of the current; and

(ii) generate a control node that drives the second path through a filter element.

12 . The circuit of claim 8 , wherein:

the first path is configured to generate, based on a third signal, the first portion of the current;

the second path is configured to generate, based on the third signal, the second portion of the current; and

the circuit further comprises an input stage configured to generate, based on the second signal, the third signal.

13 . The circuit of claim 12 , wherein the current is a first current, the third signal is a second current, and the current generator comprises a current mirror configured to:

generate, based on the second current, using the first path, a first portion of the first current; and

generate, based on the second current, using the second path, a second portion of the first current.

14 . The circuit of claim 12 , wherein the input stage is configured to generate, based on a comparison of the second signal and a fourth signal, the third signal.

15 . The circuit of claim 8 , further comprising a detector circuit configured to generate, based on a comparison of the first signal and a third signal, the second signal.

16 . The circuit of claim 14 , wherein:

the circuit has a loop bandwidth;

the first path has a pole at a pole frequency; and

the loop bandwidth is greater than the pole frequency.

Continuity (2)
Provisional Application 63609844 · Dec 13, 2023
Related Publication 20250202491A1 · Jun 19, 2025
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