Storage device, method of operating storage device, and storage system including the storage device
A storage device includes a non-volatile memory device including a user area including a plurality of first memory blocks, and a meta area including an address mapping table including an address mapping information for the plurality of first memory blocks and a meta data mapping table including meta data for the address mapping table. The address mapping table includes a sub-address mapping table, and the meta data mapping table includes meta data for the sub-address mapping table. A storage controller of the storage device updates at least one of the meta data to perform a first update operation on the sub-address mapping table and address mapping information of the sub-address mapping table to perform a second update operation on the sub-address mapping table, and flushes the address mapping table into the meta area based on a result of the update.
1 . A storage device comprising:
a non-volatile memory device comprising a user area including a plurality of first memory blocks, and a meta area comprising an address mapping table including address mapping information for the plurality of first memory blocks and a meta data mapping table including meta data for the address mapping table, wherein the address mapping table includes a sub-address mapping table, and the meta data mapping table includes meta data for the sub-address mapping table; and
a storage controller configured to update at least one of the meta data to perform a first update operation and address mapping information of the sub-address mapping table to perform a second update operation within the storage controller, and flush the meta data for the sub-address mapping table into the meta area based on the first update operation in response to a boost flag bit indicating the sub-address mapping table is boosted,
wherein the sub-address mapping table is program-skipped in a flush operation.
2 . The storage device of claim 1 , wherein:
the meta area includes a plurality of second memory blocks that are different from the plurality of first memory blocks, and
the plurality of second memory blocks are single level cell (SLC) blocks.
3 . The storage device of claim 1 , wherein the boost flag bit is included in the meta data, and the meta data includes a boost flag bit indicating consecutive placement of the address mapping information or an invalidity of the address mapping table, a starting page of a physical page number corresponding to a minimum logical page number of the address mapping table, and a table page of a physical address of the address mapping table.
4 . The storage device of claim 3 ,
wherein the boost flag bit is a logic high, and
the starting page includes a valid physical address.
5 . The storage device of claim 3 ,
wherein the boost flag bit is a logic high, and
the starting page includes vacant data.
6 . The storage device of claim 3 ,
wherein the boost flag bit is a logic low.
7 . The storage device of claim 1 , wherein the storage controller includes a memory into which the sub-address mapping table is loaded.
8 . The storage device of claim 7 , wherein the storage controller further includes a flash translation layer configured to perform the first and second update operations and load the sub-address mapping table into the memory.
9 . The storage device of claim 7 , wherein the memory is a static random-access memory (SRAM) or a dynamic random-access memory (DRAM), and the first update operation is performed as an overwrite operation on the meta data mapping table.
10 . The storage device of claim 1 , wherein the address mapping information includes a mapping between a logical page and a physical page in the user area.
11 . An operation method of a storage device comprising:
receiving a sub-address mapping table and meta data for the sub-address mapping table in response to an occurrence of an event;
loading a meta data mapping table including the meta data into a memory;
checking whether the sub-address mapping table is boosted based on the event;
updating the meta data to perform a first update operation when a result of the checking indicates the sub-address mapping table is boosted;
updating address mapping information of the sub-address mapping table to perform a second update operation when the result indicates the sub-address mapping table is not boosted; and
flushing the meta data for the sub-address mapping table to a non-volatile memory included in the storage device based on the first update operation in response to a boost flag bit indicating the sub-address mapping table is boosted, wherein the sub-address mapping table is program-skipped in the flushing.
12 . The operation method of the storage device of claim 11 , further comprising:
loading the sub-address mapping table on which the second update operation was performed into the memory before the flushing; and
aligning the sub-address mapping table loaded into the memory according to a predetermined program unit.
13 . The operation method of the storage device of claim 12 , wherein:
a size of the predetermined program unit is 16 Kilobytes (KB), and
a size of the sub-address mapping table is 4 KB.
14 . The operation method of the storage device of claim 13 , wherein:
the aligning includes creating a dummy address mapping table of 4 KB size, and
the flushing includes programming the dummy address mapping table to the non-volatile memory device.
15 . The operation method of the storage device of claim 12 , further comprising:
loading the sub-address mapping table on which the first update operation was performed into the memory before the flushing.
16 . The operation method of the storage device of claim 15 , wherein:
in the first update operation, an update for the address mapping information of the sub-address mapping table is not performed.
17 . A storage system comprising:
a storage device storing data; and
a host providing a request for the data to the storage device and including a host memory,
wherein the storage device comprises:
a non-volatile memory device including a user area including a plurality of first memory blocks configured to store the data, and a meta area comprising an address mapping table including address mapping information for the plurality of first memory blocks and a meta data mapping table including meta data for the address mapping table, wherein the address mapping table includes a sub-address mapping table, and the meta data mapping table includes meta data for the sub-address mapping table; and
a storage controller configured to update at least one of the meta data to perform a first update operation and the address mapping information to perform a second update operation within the storage controller, and flush the meta data for the sub-address mapping table into the meta area based on the first update operation in response to a boost flag bit indicating the sub-address mapping table is boosted, wherein the sub-address mapping table is program-skipped in the flushing.
18 . The storage system of claim 17 , wherein:
the host memory includes a host memory buffer allocated as a buffer of the storage device,
the host memory buffer includes the address mapping table and the meta data mapping table, and
the storage controller is configured to flush the address mapping table included in the host memory buffer into the meta area.
19 . The storage system of claim 17 , wherein:
the first and second update operations are performed based on a write request for the data or a discard request for the data of the host.