IP Library › Granted Patent US 12,751,019
Granted Patent B2
US 12,751,019 · App. 18/153,376 · Granted Sep 29, 2026

Semiconductor device and a method for manufacturing the same

Inventors: Yu-Yu Lin (New Taipei City, TW); Feng-Min Lee (Hsinchu City, TW)
Assignee: MACRONIX INTERNATIONAL CO., LTD.
H10B63/80H10N70/011H10N70/24H10N70/826
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,751,019
App. No.
18/153,376
Granted
Sep 29, 2026
Kind
B2
Abstract

A semiconductor device includes a resistor. The resistor includes two bottom electrodes adjacent to each other, a resistive layer, a top electrode and a conductive sidewall. The resistive layer is disposed on the two bottom electrodes. The top electrode is disposed on the resistive layer. The conductive sidewall surrounds the top electrode and is electrically connected to the top electrode and a bottom electrode of the two bottom electrodes. The top electrode overlaps the two bottom electrodes in the first direction, and extends above the two bottom electrodes along a second direction different from the first direction.

Claims (27)

1 . A semiconductor device, comprising at least one resistor, wherein the at least one resistor comprises:

two bottom electrodes adjacent to each other;

a resistive layer disposed on the two bottom electrodes;

a top electrode disposed on the resistive layer; and

a conductive sidewall surrounding the top electrode and being electrically connected to the top electrode and one of the two bottom electrodes;

wherein the top electrode overlaps the two bottom electrodes in a first direction, and extends above the two bottom electrodes along a second direction different from the first direction.

2 . The semiconductor device according to claim 1 , wherein the top electrode continuously extends above the two bottom electrodes along the second direction.

3 . The semiconductor device according to claim 1 , wherein the semiconductor device has a first side and a second side, and the first side is opposite to the second side along the second direction.

4 . The semiconductor device according to claim 3 , wherein a contact area between a bottom electrode in the two bottom electrodes closer to the first side and the resistive layer is smaller than a contact area between a bottom electrode in the two bottom electrodes closer to the second side and the resistive layer.

5 . The semiconductor device according to claim 3 , wherein a bottom electrode in the two bottom electrodes closer to the first side directly contacts the conductive sidewall.

6 . The semiconductor device according to claim 3 , wherein the resistive layer comprises a first resistive layer adjacent to the first side and a second resistive layer adjacent to the second side, and a gap is formed between the first resistive layer and the second resistive layer in the second direction.

7 . The semiconductor device according to claim 6 , wherein a width of the first resistive layer in the second direction is smaller than a width of the second resistive layer in the second direction.

8 . The semiconductor device according to claim 1 , further comprising a protective layer, wherein the protective layer is disposed on the resistive layer, and the top electrode is disposed on the protective layer.

9 . The semiconductor device according to claim 1 , wherein a number of the at least one resistor is plural, and the resistors overlapping each other in the second direction are electrically connected to each other to form a resistor string.

10 . The semiconductor device according to claim 1 , further comprising

a substrate;

a plurality of contacts disposed on the substrate, respectively extending along the first direction and electrically contacting the substrate;

a plurality of bottom conductive layers respectively disposed on corresponding contacts in the contacts, wherein a number of the at least one resistor is plural, and the resistors are disposed on the bottom conductive layers.

11 . A method for manufacturing a semiconductor device, comprising forming at least one resistor, wherein forming steps of the at least one resistor comprises:

forming two bottom electrodes adjacent to each other;

forming a resistive layer disposed on the two bottom electrodes;

forming a top electrode disposed on the resistive layer; and

forming a conductive sidewall, wherein the conductive sidewall surrounds the top electrode and is electrically connected to the top electrode and one of the two bottom electrodes;

wherein the top electrode overlaps the two bottom electrodes in a first direction, and extends above the two bottom electrodes along a second direction different from the first direction.

12 . The method for manufacturing a semiconductor device according to claim 11 , wherein the top electrode continuously extends above the two bottom electrodes along the second direction.

13 . The method for manufacturing a semiconductor device according to claim 11 , wherein the semiconductor device has a first side and a second side, and the first side is opposite to the second side along the second direction.

14 . The method for manufacturing a semiconductor device according to claim 13 , wherein the resistive layer comprises a first resistive layer adjacent to the first side and a second resistive layer adjacent to the second side, and a gap is formed between the first resistive layer and the second resistive layer in the second direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2023
From: LIN, YU-YU; LEE, FENG-MIN
To: MACRONIX INTERNATIONAL CO., LTD.
Reel/Frame 062354/0001 →
Continuity (1)
Related Publication 20240244849A1 · Jul 18, 2024
References Cited (4)
US 10134870B2 · Ching · 2018 [cited by examiner]
US 10665691B2 · Ching · 2020 [cited by examiner]
US 20070235709A1 · Kostylev et al. · 2007 [cited by applicant]
US 20240244849A1 · Lin · 2024 [cited by examiner]