IP Library Granted Patent US 6,838,312
Granted Patent B2
US 6,838,312 · App. 10/314,289 · Granted Jan 4, 2005

Semiconductor device having a primary chip with bumps in joined registration with bumps of a plurality of secondary chips

Assignee: ROHM Co., Ltd.
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Quick Facts
Patent No.
US 6,838,312
App. No.
10/314,289
Granted
Jan 4, 2005
Kind
B2
Abstract

A semiconductor device having a plurality of semiconductor chips respectively joined to predetermined positions on a surface of a solid, and a frame holding the plurality of semiconductor chips in a relative positional relationship corresponding to joint positions on the surface of the solid. The solid may be another semiconductor chip or a wiring board. The plurality of semiconductor chips may be bonded to a surface, opposite to the surface, of the solid, of the frame. The plurality of semiconductor chips may be respectively fitted in through holes formed in the frame.

Claims (32)

1. A method of assembling a semiconductor device by respectively joining a plurality of semiconductor chips to predetermined positions on a surface of a solid, comprising:

holding the plurality of semiconductor chips in a frame in a relative positional relationship corresponding to joint positions on the surface of the solid, by

preparing the frame to have through holes formed therein, and respectively fitting the semiconductor chips in the through holes;

aligning and overlapping the frame with the surface of the solid; and

joining the plurality of semiconductor chips held in the frame to the surface of the solid.

2. The method according to claim 1 , wherein

the surface of the solid has a plurality of first electrically-conductive elements thereon, the surface of the solid facing the semiconductor chips,

each of the semiconductor chips has a surface facing the surface of the solid, the surface of each semiconductor chip having a plurality of second electrically-conductive elements thereon,

at least one of the first electrically-conductive elements and the second electrically-conductive elements includes bumps projecting from a respective one of the surface of the solid and the surfaces of the semiconductor chips, and

the joining step includes joining the first electrically-conductive elements and the second electrically-conductive elements to each other.

3. A method of assembling a semiconductor device by respectively joining a plurality of semiconductor chips to predetermined positions on a surface of a solid, comprising:

holding the plurality of semiconductor chips in a frame in a relative positional relationship corresponding to joint positions on the surface of the solid;

aligning and overlapping the frame with the surface of the solid;

joining the plurality of semiconductor chips held in the frame to the surface of the solid; and

sealing together the semiconductor chips and the frames, which are joined to the surface of the solids, with resin.

4. The method according to claim 3 , wherein the step of holding the plurality of semiconductor chips in the frame includes the step of bonding the plurality of semiconductor chips to one surface of the frame.

5. The method according to claim 3 , wherein

the surface of the solid has a plurality of first electrically-conductive elements thereon, the surface of the solid facing the semiconductor chips,

each of the semiconductor chips has a surface facing the surface of the solid, the surface of each semiconductor chip having a plurality of second electrically-conductive elements thereon,

at least one of the first electrically-conductive elements and the second electrically-conductive elements includes bumps projecting from a respective one of the surface of the solid and the surfaces of the semiconductor chips, and

the joining step includes joining the first electrically-conductive elements and the second electrically-conductive elements to each other.

6. A method of assembling a semiconductor device by respectively joining a plurality of semiconductor chips to predetermined positions on a surface of a solid, comprising:

holding the plurality of semiconductor chips in a frame in a relative positional relationship corresponding to joint positions on the surface of the solid;

aligning and overlapping the frame with the surface of the solid;

joining the plurality of semiconductor chips held in the frame to the surface of the solid; and

electrically connecting the frame and the solid to each other,

the frame being also used as a lead frame.

7. The method according to claim 6 , wherein

the surface of the solid has a plurality of first electrically-conductive elements thereon, the surface of the solid facing the semiconductor chips,

each of the semiconductor chips has a surface facing the surface of the solid, the surface of each semiconductor chip having a plurality of second electrically-conductive elements thereon,

at least one of the first electrically-conductive elements and the second electrically-conductive elements includes bumps projecting from a respective one of the surface of the solid and the surfaces of the semiconductor chips, and

the joining step includes joining the first electrically-conductive elements and the second electrically-conductive elements to each other.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 31, 2020
From: ROHM CO., LTD.
To: ACHLYS TECHNOLOGIES INC.
Reel/Frame 052273/0877 →
Priority Claims (1)
JP 11-45210 · Feb 23, 1999 · national
Continuity (2)
Division 0951110800 · Feb 23, 2000
Related Publication 20030122248A1 · Jul 3, 2003