IP Library Granted Patent US 6,900,094
Granted Patent B2
US 6,900,094 · App. 10/172,542 · Granted May 31, 2005

Method of selective removal of SiGe alloys

Assignee: AmberWave Systems Corporation
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Quick Facts
Patent No.
US 6,900,094
App. No.
10/172,542
Granted
May 31, 2005
Kind
B2
Abstract

A method is disclosed of forming buried channel devices and surface channel devices on a heterostructure semiconductor substrate. In an embodiment, the method includes the steps of providing a structure including a first layer having a first oxidation rate disposed over a second layer having a second oxidation rate wherein the first oxidation rate is greater than the second oxidation rate, reacting said first layer to form a sacrificial layer, and removing said sacrificial layer to expose said second layer.

Claims (44)

1. A method of forming a semiconductor substrate, comprising:

providing a structure comprising a first layer having a first oxidation rate disposed over a second layer having a second oxidation rate, wherein the first oxidation rate is greater than the second oxidation rate;

reacting said first layer to form a sacrificial layer; and

removing said sacrificial layer to expose said second layer,

wherein the second layer comprises a strained semiconductor.

2. A method of forming a semiconductor substrate, comprising:

providing a structure comprising a first aver having a first oxidation rate disposed over a second layer having a second oxidation rate, wherein the first oxidation rate is greater than the second oxidation rate;

reacting said first layer to form a sacrificial layer; and

removing said sacrificial layer to expose said second layer,

wherein the second layer comprises Si.

3. A method of forming a semiconductor substrate, comprising:

providing a structure comprising a first layer having a first oxidation rate disposed over a second layer having a second oxidation rate, wherein the first oxidation rate is greater than the second oxidation rate;

reacting said first layer to form a sacrificial layer; and

removing said sacrificial layer to expose said second layer,

wherein said semiconductor substrate further comprises an insulator layer disposed beneath said second layer.

4. The method as claimed in claim 3 , wherein said insulator layer comprises silicon dioxide.

5. A method of forming a semiconductor substrate, comprising:

providing a structure comprising a first layer having a first oxidation rate disposed over a second layer having a second oxidation rate, wherein the first oxidation rate is greater than the second oxidation rate;

reacting said first layer to form a sacrificial layer, wherein said reacting comprises thermal oxidation performed at or below a temperature of approximately 850° C.; and

removing said sacrificial layer to expose said second layer.

6. A method of forming a semiconductor substrate, comprising:

providing a structure comprising a first layer having a first oxidation rate disposed over a second layer having a second oxidation rate, wherein the first oxidation rate is greater than the second oxidation rate;

reacting said first layer to form a sacrificial layer; and

removing said sacrificial layer to expose said second layer,

wherein said step of reacting said first layer to form a sacrificial layer comprises chemical oxidation.

7. A method of forming a semiconductor substrate, comprising:

providing a structure comprising a first layer having a first oxidation rate disposed over a second layer having a second oxidation rate, wherein the first oxidation rate is greater than the second oxidation rate;

reacting said first layer to form a sacrificial layer; and

removing said sacrificial aver to expose said second layer,

wherein said step of reacting said first layer to form a sacrificial layer is performed on a first region of said first layer and not on a second region of said first layer.

8. The method as claimed in claim 7 , wherein said method further comprises forming a surface channel device in said first region.

9. The method as claimed in claim 7 , wherein said method further comprises forming a buried channel device in said second region.

10. The method as claimed in claim 7 , wherein said method further comprises:

forming a surface channel device in said first region; and

forming a buried channel device in said second region, wherein the channel of said surface channel device and said buried channel device comprises a second device layer.

11. The method as claimed in claim 10 , wherein said second layer comprises Si and said first layer comprises SiGe.

12. A method of forming devices on a substrate said method comprising the steps of:

providing a structure comprising a SiGe layer disposed over a strained semiconductor layer; and

selectively removing said SiGe layer in a first region but not in a second region such that a surface channel device may be formed on said first region and a buried channel device may be formed on said second region.

13. A method of forming devices on a substrate, said method comprising the steps of

providing a structure comprising a SiGe layer disposed over a strained semiconductor layer;

oxidizing said SiGe layer to form a SiGe oxide in a first region but not in a second region of said structure;

removing said SiGe oxide; and

forming a surface channel device in said first region and a buried channel device in said second region such that the strained semiconductor layer serves as the channel layer of each device.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 26, 2010
From: AMBERWAVE SYSTEMS CORPORATION
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 023848/0183 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 23, 2002
From: HAMMOND, RICHARD; CURRIE, MATTHEW
To: AMBERWAVE SYSTEMS CORPORATION
Reel/Frame 013612/0692 →
Continuity (2)
Provisional Application 6029815300 · Jun 14, 2001
Related Publication 20030013323A1 · Jan 16, 2003