IP Library Granted Patent US 6,903,442
Granted Patent B2
US 6,903,442 · App. 10/232,549 · Granted Jun 7, 2005

Semiconductor component having backside pin contacts

Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 6,903,442
App. No.
10/232,549
Granted
Jun 7, 2005
Kind
B2
Abstract

A semiconductor component includes back side pin contacts fabricated using a circuit side fabrication method. The component also includes a thinned semiconductor die having a pattern of die contacts, and conductive members formed by filled openings in the die contacts and the die. In addition, the pin contacts are formed by terminal portions of the conductive members. The fabrication method includes the steps of forming the openings and the conductive members, and then thinning and etching the die to form the pin contacts. An alternate embodiment female component includes female conductive members configured to physically and electrically engage pin contacts on a mating component of a stacked assembly.

Claims (38)

1. A semiconductor component comprising:

a substrate comprising a plurality of integrated circuits and a plurality of contacts in electrical communication with the integrated circuits;

a plurality of openings in the substrate;

a plurality of conductive members on the substrate, each conductive member comprising a conductive material in an opening in electrical communication with a contact;

a plurality of pin contacts on the substrate comprising exposed terminal portions of the conductive members; and

a second substrate on the substrate comprising a plurality of second integrated circuits, and a plurality of second conductive members comprising plated openings in electrical communication with the second integrated circuits configured to receive the pin contacts.

2. The component of claim 1 wherein the substrate comprises a thinned semiconductor die.

3. The component of claim 1 further comprising a polymer layer on the substrate.

4. The component of claim 1 further comprising a non-oxidizing layer on each pin contact.

5. The component of claim 1 further comprising a plurality of conductors on the substrate in electrical communication with the contacts.

6. The components of claim 1 further comprising a plurality of front side contacts on the substrate in electrical communication with the conductive members.

7. A semiconductor component comprising:

a substrate comprising a circuit side, a back side and a plurality of integrated circuits;

a plurality of contacts on the circuit side in electrical communication with the integrated circuits;

a plurality of conductive members in the substrate comprising openings in the contacts and a conductive material in the openings in electrical contact with the contacts;

a plurality of terminal contacts on the back side comprising exposed portions of the conductive members; and

a second substrate on the substrate comprising a plurality of second integrated circuits and a plurality of plated openings in the second substrate in electrical communication with the second integrated circuits electrically engaging the terminal contacts.

8. The component of claim 7 further comprising a plurality of conductors and a plurality of circuit side contacts on the circuit side in electrical communication with the conductors.

9. The component of claim 7 wherein the terminal contacts comprise pins and the plated openings are configured to receive the pins.

10. The component of claim 7 wherein the substrate comprises a semiconductor die having a thickness of from 50 μm to 300 μm.

11. The component of claim 7 wherein the second substrate comprises a second semiconductor die having a thickness of from 50 μm to 300 μm.

12. A semiconductor component comprising:

a die comprising a plurality of integrated circuits, a circuit side, a back side, and a plurality of die contacts on the circuit side in electrical communication with the integrated circuits;

a plurality of conductive members in the die, each conductive member comprising an opening in a die contact and the die and a conductive material in the opening in electrical contact with the die contact;

a plurality of pin contacts on the back side comprising exposed terminal portions of the conductive members; and

a second die on the die comprising a plurality of second integrated circuits and a plurality of second conductive members in electrical communication with the second integrated circuits electrically engaging the conductive members.

13. The component of claim 12 further comprising a plurality of conductors on the circuit side in electrical communication with the conductive members.

14. The component of claim 12 further comprising a plurality of circuit side contacts on the circuit side in electrical communication with the conductive members.

15. The component of claim 12 further comprising a plurality of non-oxidizing layers on the pin contacts.

16. The component of claim 12 wherein the second conductive members comprise plated openings in the second die configured to receive the pin contacts.

17. The component of claim 12 wherein the pin contacts are arranged in a pin grid array or a micro pin grid array.

18. An electronic assembly comprising:

a supporting substrate comprising a plurality of electrodes;

a semiconductor component on the supporting substrate comprising a die having a circuit side and a back side, and a plurality of die contacts on the circuit side;

a plurality of conductive members in the die, each conductive member comprising an opening in a die contact and a conductive material in the opening in electrical contact with the die contact;

a plurality of pin contacts on the back side comprising exposed tip portions of the conductive members in electrical communication with the electrodes; and

a second component stacked on the component comprising a second die having a second circuit side and a second back side, a plurality of second die contacts on the second circuit side, and a plurality of second conductive members in the second die comprising plated openings in the second die electrically engaging the pin contacts.

19. The assembly of claim 18 wherein the die has a thickness of from 50 μm to 300 μm.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2002
From: WOOD, ALAN G.; DOAN, TRUNG TRI
To: MICRON TECHNOLOGY, INC.
Reel/Frame 013260/0069 →
Continuity (1)
Related Publication 20040041260A1 · Mar 4, 2004