IP Library › Granted Patent US 6,915,942
Granted Patent B2
US 6,915,942 · App. 10/156,098 · Granted Jul 12, 2005

Method of manufacturing mount structure without introducing degraded bonding strength of electronic parts due to segregation of low-strength/low-melting point alloy

Assignee: NEC Corporation
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Quick Facts
Patent No.
US 6,915,942
App. No.
10/156,098
Granted
Jul 12, 2005
Kind
B2
Abstract

A method of manufacturing a mount structure according to the present invention which forcedly cools down a melted solder paste on a printed circuit board at a cooling speed of 1.5° C./second or higher to solidify the solder paste when an electronic part is mounted on the printed circuit board by reflow processing.

Claims (18)

1. A method of manufacturing a mount structure having a printed board and an electronic part, which contains Pb in the plating film of a lead, mounted on said printed board by soldering, said method comprising the steps of:

a) applying a solder paste which comprise a Sn—Zn based alloy and contains less than 3% of Bi on said printed board, and loading said electronic part on said printed board through said solder paste;

b) heating and melting said solder paste applied on said printed board; and

c) forcedly cooling down said melted solder paste at a cooling speed in said range of 1.5° C./second to 3.3° C./second in the state where Pb contained in said plating film of said lead of said electronic parts begins to melt into solder paste by melting solder paste, to solidify said melted solder paste.

2. The manufacturing method according to claim 1 , wherein said step b) includes heating said solder paste to 210° C. or higher.

3. The manufacturing method according to claim 1 , wherein said step c) includes cooling down said solder paste to 190° C. or lower.

4. The manufacturing method according to claim 1 , wherein said solder paste comprises two kinds or more of solder powders blended into a paste form.

5. The manufacturing method according to claim 1 , further comprising the step of:

after a first electronic part is mounted on one side of said printed board through said step a), said step b) and said step c), mounting a second electronic part on the other side of said printed board through said step a), said step b) and said step c),

wherein said step c) for said second electronic part includes forcedly cooling down the solders on both sides of said printed board, said solders being melted in said step b) for said second electronic part, to solidify said solders.

6. The manufacturing method according to claim 1 , further comprising the steps of:

after mounting a first electronic part on one side of said printed board through said step a), said step b) and said step c), loading a second electronic part by inserting leads of said second electronic part through throughholes of said printed board from the one side of said printed board; and

mounting said second electronic part by flowing while maintaining the solder applied on the one side of said printed board at temperatures of 170° C. or lower.

7. The manufacturing method according to claim 6 , wherein said flow process includes adjusting the temperature of said solder by sending cooling air to said solder applied on one side of said printed board.

8. The manufacturing method according to claim 7 , wherein said cooling air comprises an N2 gas.

9. The manufacturing method according to claim 6 , wherein said flow process includes adjusting the temperature of said solder by disposing a thermally insulating material on the other side to cover the electronic part mounted on the one side of said printed board from the other side of said printed board.

10. The manufacturing method according to claim 9 , wherein said thermally insulating material comprises a masking tape adhered on said printed board.

11. The manufacturing method according to claim 9 , wherein said thermally insulating material comprises a tray on which said printed board is placed.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2011
From: NEC CORPORATION
To: NEC PERSONAL COMPUTERS, LTD.
Reel/Frame 027154/0170 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2002
From: WATANABE, SHINJI; SAKAI, HIROSHI; SUZUKI, MOTOJI; IGARASHI, MAKOTO; TANAKA, AKIHIRO
To: NEC CORPORATION
Reel/Frame 013548/0795 →
Priority Claims (2)
JP 2001-166970 · Jun 1, 2001 · national
JP 2002-048026 · Feb 25, 2002 · national
Continuity (1)
Related Publication 20030005581A1 · Jan 9, 2003