IP Library › Granted Patent US 7,071,096
Granted Patent B2
US 7,071,096 · App. 11/039,103 · Granted Jul 4, 2006

Method of forming a conductive barrier layer within critical openings by a final deposition step after a re-sputter deposition

Assignee: Advanced Micro Devices, Inc.
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Quick Facts
Patent No.
US 7,071,096
App. No.
11/039,103
Granted
Jul 4, 2006
Kind
B2
Abstract

In forming a thin conductive layer in an interconnect structure by sputter deposition including a re-sputtering step, a flash deposition step is performed after the re-sputtering step to provide a sufficient layer thickness at critical locations, such as at positions of structure irregularities. The flash deposition step may be performed for a fixed process time so that less effort in process control is required while, at the same time, an increased reliability may be obtained compared to conventional approaches without a flash deposition.

Claims (44)

1. A method, comprising:

sputter depositing a layer of conductive material within an opening formed in a dielectric layer;

re-sputtering a portion of said conductive material deposited within said opening;

sputter depositing additional portions of said conductive material within said opening; and

performing at least one additional re-sputtering process after the process of sputter depositing said additional portions of said conductive material within said opening.

2. The method of claim 1 , wherein sputter depositing additional portions of said conductive material is performed for a predefined time period.

3. The method of claim 2 , wherein said predefined time period ranges from approximately 1–5 seconds.

4. The method of claim 1 , wherein re-sputtering a portion of said conductive material is performed in a sputter ambient of a first state and sputter depositing said additional portions of said conductive material is performed in said sputter ambient being in a second state, a bias power of said second state being lower than a bias power of said first state.

5. The method of claim 4 , wherein a pressure in said sputter ambient in the first state is higher than a pressure of said second state.

6. The method of claim 1 , further comprising controlling at least one process parameter of a sputter ambient during the sputter deposition of said additional portions of said conductive material to adjust a deposition non-uniformity of said conductive material in said opening.

7. The method of claim 1 , further comprising controlling at least one process parameter of a sputter ambient during the sputter deposition of said additional portions of said conductive material to adjust a deposition rate for depositing said additional portions of said conductive material.

8. The method of claim 1 , wherein said conductive material comprises at least one of tantalum and tantalum nitride.

9. The method of claim 1 , wherein said conductive material comprises copper.

10. The method of claim 1 , wherein process parameters for sputter depositing said conductive material are substantially the same as for sputter depositing said additional portions of said conductive material.

11. A method of controlling a degree of coverage of an interconnect structure, the method comprising:

providing a substrate having formed therein at least one interconnect structure including vias and trenches;

forming a layer of conductive material above said interconnect structure by a re-sputter deposition technique;

sputter depositing said conductive material in a final flash based on at least one specified process parameter;

determining a thickness of said conductive material at a critical position in said interconnect structure;

determining a desired value of said at least one specified process parameter on the basis of said determined thickness; and

forming a layer of said conductive material on one or more substrates while using said desired value in said final flash of sputter deposition.

12. The method of claim 11 , wherein said thickness of said conductive material is determined on the basis of a plurality of different parameter settings of said at least one specified process parameter.

13. The method of claim 11 , wherein said at least one specified process parameter represents at least one of a bias power, a pressure of a deposition ambient during said final flash and a deposition time of said final flash.

14. A method, comprising:

sputter depositing a layer of conductive material within an opening formed in a dielectric layer;

re-sputtering with a first bias power a portion of said conductive material deposited within said opening;

sputter depositing additional portions of said conductive material within said opening with a second bias power for a fixed deposition time, said second bias power being less than said first bias power; and

performing at least one additional re-sputtenng process after the process of sputter depositing said additional portions of said conductive material within said opening.

15. The method of claim 14 , wherein said fixed deposition time is in the range of approximately 1–5 seconds.

16. The method of claim 14 , wherein a pressure during sputter depositing said additional portions is equal to or lower than a pressure during re-sputtering a portion of said conductive material.

17. The method of claim 14 , further comprising controlling at least one process parameter of a sputter ambient during the sputter deposition of said additional portions to adjust a deposition non-uniformity of said conductive material in said opening.

18. The method of claim 14 , further comprising controlling at least one process parameter of a sputter ambient during the sputter deposition of said additional portions to adjust a deposition rate for depositing said additional portions.

19. The method of claim 14 , wherein said conductive material comprises at least one of tantalum and tantalum nitride.

20. The method of claim 14 , wherein said conductive material comprises copper.

21. The method of claim 14 , wherein process parameters for sputter depositing said conductive material are substantially the same as for sputter depositing said additional portions.

22. A method of sputter depositing a conductive material over an interconnect structure, the method comprising:

sputter depositing a first layer of said conductive material;

performing a sequence including re-sputtering a portion of said conductive material and depositing a second layer of said conductive material, said sequence being a non-final sequence of sputter depositing said conductive material; and

performing a second sequence including re-sputtering a portion of said second layer of said conductive material and depositing a further layer of said conductive material.

23. The method of claim 22 , further comprising performing at least one re-sputter process after performing said sequence.

24. The method of claim 22 , wherein depositing of said second layer during said sequence is performed for a predefined time period.

25. The method of claim 24 , wherein said predefined time period is in the range of approximately 1–5 seconds.

26. The method of claim 22 , wherein a pressure during depositing said second layer is equal to or lower than a pressure during re-sputtering a portion of said conductive material.

27. The method of claim 22 , wherein a bias power supplied to a deposition ambient during depositing said second layer is lower than a bias power supplied during re-sputtering a portion of said conductive material.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →
AFFIRMATION OF PATENT ASSIGNMENT Recorded Aug 18, 2009
From: ADVANCED MICRO DEVICES, INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 023119/0083 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 20, 2005
From: FRIEDEMANN, MICHAEL; KAHLERT, VOLKER
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 016211/0272 →
Priority Claims (1)
DE 10 2004 015 862 · Mar 31, 2004 · national
Continuity (1)
Related Publication 20050233582A1 · Oct 20, 2005