Electrical package capable of increasing the density of bonding pads and fine circuit lines inside a interconnection
An electrical package and manufacturing method thereof is provided. A high stiffness, high electrical conductivity, low coefficient of thermal expansion and high thermal conductivity support substrate is used as an initial layer for building the package. A multilayer interconnection structure is formed over the support substrate. Thereafter, a plurality of openings is formed over the support substrate. The openings expose a plurality of bonding pads on a bottom surface of the multi-layer interconnection structure. An electronic device is set up over the multi-layer interconnection structure. Contacts are formed inside the opening over the bonding pads.
1. An electrical package comprising:
a multi-layer interconnection structure having a top surface, a bottom surface and an inner circuit therein, wherein the inner circuit has a plurality of bonding pads on the bottom surface of the multi-layer interconnection structure;
at least an electronic device positioned on the top surface of the multi-layer interconnection structure and electrically connected to the inner circuit of the multi-layer interconnection structure;
a support substrate made from a conductive material, wherein the support substrate is positioned on the bottom surface of the multi-layer interconnection structure, and the support substrate has a plurality of first openings, each first opening exposing one of the corresponding bonding pads; and
an insulation layer covering the support substrate and exposing the bonding pads.
2. The electrical package of claim 1 , further comprising a patterned barrier layer covering the bonding pads and exposed by the first openings.
3. The electrical package of claim 1 , wherein the electronic device comprises a die, a passive component or an electrical package.
4. The electrical package of claim 1 , wherein material constituting the support substrate comprises a metallic material or an alloy.
5. The electrical package of claim 1 , wherein the package further comprises a plurality of contacts connected to various bonding pads through corresponding first openings.
6. The electrical package of claim 5 , wherein the contacts are configured as solder balls, pins or electrode blocks.
7. The electrical package of claim 5 , wherein at least one of the contacts completely fills the first opening so that the contact is electrically connected to the support substrate.
8. The electrical package of claim 1 , wherein the insulation layer exposes a sidewall of at least one of the first openings.
9. The electrical package of claim 1 , the package further comprises a solder mask layer disposed over a sidewall of at least one of the first openings.
10. The electrical package of claim 1 , wherein the electronic device is electrically connected to the inner circuit within the multi-layer interconnection structure through flip-chip bonding, wire-bonding or a thermal pressure bonding.
11. The electrical package of claim 1 , further comprising a patterned barrier layer and a plurality of conductive vias, the patterned barrier layer covering the bonding pads and the conductive vias disposing on the patterned barrier layer, wherein the patterned barrier layer and the conductive vias are exposed by the first openings.
12. The electrical package of claim 11 , further comprises a plurality of contacts, each contact electrically connecting to one of the conductive vias and the patterned barrier layer, such that the contacts are electrically connected to the bonding pads through the patterned barrier layer and the conductive vias.