IP Library › Granted Patent US 7,092,234
Granted Patent B2
US 7,092,234 · App. 10/442,509 · Granted Aug 15, 2006

DRAM cells and electronic systems

Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 7,092,234
App. No.
10/442,509
Granted
Aug 15, 2006
Kind
B2
Abstract

The invention includes capacitor constructions which have a layer of aluminum oxide between a high-k dielectric material and a layer containing titanium and nitrogen. The layer containing titanium and nitrogen can be, for example, titanium nitride and/or boron-doped titanium nitride. The capacitor constructions can be incorporated into DRAM cells, which in turn can be incorporated into electronic systems. The invention also includes methods of forming capacitor constructions.

Claims (35)

1. A DRAM cell, comprising:

a transistor having a gate and a pair of source/drain regions operatively proximate the gate; and

a capacitor electrically coupled to one of the source/drain regions of the transistor, the capacitor including:

a first capacitor electrode comprising conductively-doped hemispherical grain polysilicon and an electrically-conductive first layer over and in direct physical contact with the hemispherical grain polysilicon; the first layer comprising titanium and nitrogen;

a second layer physically against the first layer, the second layer comprising aluminum oxide;

a high-k dielectric material over the second layer, the high-k dielectric material comprising a composition other than aluminum oxide; and

a second capacitor electrode over the high-k dielectric material and comprising titanium nitride in direct contact with the high-k dielectric material.

2. The DRAM cell of claim 1 supported by a semiconductor substrate.

3. The DRAM cell of claim 2 wherein the semiconductor substrate includes a monocrystalline silicon wafer.

4. The DRAM cell of claim 1 wherein the high-k dielectric material is selected from the group consisting of Ta 2 O 5 , HfO x , ZrO y , barium titanate, barium strontium titanate, strontium titanate, and lead zirconate titanate, where x and y are numbers greater than 0.

5. The DRAM cell of claim 1 wherein the second capacitor electrode comprises an outermost layer over an inner layer, and wherein the inner layer comprises the titanium nitride and wherein the outermost layer comprises electrically conductive material.

6. The DRAM cell of claim 5 wherein the inner layer of the second capacitor electrode comprises a thickness of from about 25 angstroms to about 250 angstroms.

7. The DRAM cell of claim 5 wherein the inner layer of the second capacitor electrode comprises a thickness of from about 25 angstroms to about 100 angstroms.

8. The DRAM cell of claim 5 wherein the electrically conductive material of the outermost layer comprises at least one of conductively-doped silicon, metal and metal compounds.

9. The DRAM cell of claim 1 wherein the first layer of the first capacitor electrode comprises a concentration of boron.

10. The DRAM cell of claim 9 wherein the concentration of the boron comprises from about 0.01% to about 30% atomic percentage.

11. The DRAM cell of claim 1 wherein the first layer of the first capacitor electrode comprises a combination of boron-doped titanium nitride and titanium nitride.

12. The DRAM cell of claim 1 wherein the second layer comprises a thickness of from about 25 angstroms to about 100 angstroms.

13. The DRAM cell of claim 1 wherein the first layer of the first capacitor electrode comprises a thickness of from about 25 angstroms to about 250 angstroms.

14. The DRAM cell of claim 1 wherein the first layer of the first capacitor electrode comprises a thickness of from about 25 angstroms to about 100 angstroms.

15. An electronic system, comprising;

a plurality of individual memory cells arranged in an array;

accessing circuitry for accessing individual memory cells within the array;

read circuitry for reading data from individual memory cells within the array; and

wherein one or more of the individual memory cells individually comprises a capacitor which includes:

a first capacitor electrode comprising conductively-doped hemispherical grain polysilicon and an electrically-conductive first layer over and in direct physical contact with the hemispherical grain polysilicon; the first layer comprising titanium and nitrogen;

a second layer physically against the first layer, the second layer comprising aluminum oxide;

a high-k dielectric material over the second layer, the high-k dielectric material comprising a composition other than aluminum oxide; and

a second capacitor electrode over the high-k dielectric material and comprising titanium nitride in direct contact with the high-k dielectric material.

16. The electronic system of claim 15 wherein the second capacitor electrode comprises an outermost layer over an inner layer, and wherein the inner layer comprises the titanium nitride and wherein the outermost layer comprises electrically conductive material.

17. The electronic system of claim 16 wherein the inner layer of the second capacitor electrode comprises a thickness of from about 25 angstroms to about 250 angstroms.

18. The electronic system of claim 16 wherein the inner layer of the second capacitor electrode comprises a thickness of from about 25 angstroms to about 100 angstroms.

19. The electronic system of claim 16 wherein the electrically conductive material of the outermost layer comprises at least one of conductively-doped silicon, metal and metal compounds.

20. The electronic system of claim 15 wherein the first layer of the first capacitor electrode comprises a concentration of boron.

21. The electronic system of claim 20 wherein the concentration of the boron comprises from about 0.01% to about 30% atomic percentage.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2003
From: BASCERI, CEM; GRAETTINGER, THOMAS M.
To: MICRON TEHCHNOLOGY, INC.
Reel/Frame 014106/0559 →
Continuity (1)
Related Publication 20040233610A1 · Nov 25, 2004