Signal and/or ground planes with double buried insulator layers and fabrication process
The present invention describes a method including the steps of providing a single crystal semiconductor substrate, forming a layer of rare earth silicide on a surface of the semiconductor substrate, forming a first layer of insulating material on the layer of rare earth silicide, forming a layer of electrically conductive material on the first layer of insulating material, and forming a second layer of insulating material on the layer of electrically conductive material. In one embodiment the step of forming the layer of rare earth silicide includes depositing a layer of rare earth metal on a surface of the semiconductor substrate depositing a layer of insulating material on the layer of rare earth metal, and annealing the structure to form a layer of rare earth silicide in conjunction with the surface of the semiconductor substrate and a rare earth doped insulating layer in conjunction with the layer of insulating material.
1. A method of fabricating a structure including one or more buried conductive layers and one or more associated insulator layers on a semiconductor substrate comprising the steps of:
providing a single crystal semiconductor substrate;
depositing a layer of rare earth metal on a surface of the semiconductor substrate;
depositing a layer of insulating material on the layer of rare earth metal; and
annealing the structure to form a layer of rare earth silicide in conjunction with the surface of the semiconductor substrate and a rare earth doped insulating layer in conjunction with the layer of insulating material.
2. A method as claimed in claim 1 wherein the step of providing the single crystal semiconductor substrate includes providing a single crystal silicon substrate.
3. A method as claimed in claim 2 wherein the step of depositing the layer of insulating material includes depositing a layer of silicon insulating material.
4. A method as claimed in claim 1 including an additional step of positioning an active semiconductor layer on the layer of insulating material.
5. A method as claimed in claim 4 wherein the step of positioning an active semiconductor layer on the layer of insulating material includes wafer bonding.
6. A method as claimed in claim 1 including additional steps of depositing a layer of conductive material on the layer of insulating material and depositing a second layer of insulating material on the layer of conductive material.
7. A method as claimed in claim 6 including an additional step of positioning an active semiconductor layer on the second layer of insulating material.
8. A method as claimed in claim 7 wherein the step of positioning an active semiconductor layer on the second layer of insulating material includes wafer bonding.