Lateral double-diffused metal oxide semiconductor (LDMOS) device with an enhanced drift region that has an improved R
View Patent ↗A lateral double-diffused metal oxide semiconductor (LDMOS) device is disclosed. The LDMOS device comprises a gate region and a body region under the gate region. The LDMOS device includes an enhanced drift region under the gate region. The enhanced drift region touches the body region. By designing the device such that the enhanced drift region overlaps and compensates the lateral tail of the body region of the LDMOS transistor, the Ron*area product is reduced. Accordingly, the on-resistance is significantly reduced while minimally affecting the breakdown voltage of the device.
1. A method for providing a lower Ron*product LDMOS device comprising the steps of:
(a) providing a gate region on a substrate;
(b) providing a body region on the substrate after the gate region has been provided, wherein the body region is underneath the gate region; and
(c) providing an enhanced drift region under the gate region after the gate region has been provided, wherein the enhanced drift region purposely overlaps the body region, and wherein the drift region and the body region are both self-aligned to the gate region and therefore self-aligned to each other.
2. The method of claim 1 wherein the gate region is of such a length that the enhanced drift region purposely overlaps the body region when the enhanced drift region is implanted in the substrate.
3. The method of claim 1 wherein the body region is provided by implanting Boron ions into the substrate.
4. The method of claim 3 wherein the enhanced drift region is provided by implanting phosphorous ions that are self-aligned with the gate region into the substrate.
5. The method of claim 1 further comprising providing a drain region in the enhanced drift region and providing a source region in the body region.
6. The method of claim 5 wherein the drain region is entirely within the enhanced drift region.
7. The method of claim 6 further comprising providing a layer, well, or substrate under the enhanced drift region and the body region, wherein the layer, well, or substrate has the same conductivity type as the enhanced drift region.
8. The method of claim 1 wherein the conductivity type of the enhanced drift region is N-type.
9. The method of claim 1 wherein the conductivity type of the enhanced drift region is P-type.
10. The method of claim 1 wherein the providing of the enhanced drift region is performed after the body region has been provided on the substrate.
11. The method of claim 1 wherein the body region extends on the substrate away from a first side of the gate region, and the enhanced drift region extends on the substrate away from a second side of the gate region opposite to the first side.
12. A method for providing a lower Ron*product LDMOS device comprising the steps of:
(a) providing a gate region on a substrate;
(b) providing a body region on the substrate after the gate region has been provided, wherein the body region is underneath the gate region; and
(c) implanting an enhanced drift region in the substrate under the gate region after the gate region has been provided, wherein the gate region is of a particular length such that the enhanced drift region, after implantation, purposely overlaps the lateral tail of the body region, and wherein the drift region and the body region are both self-aligned to the gate region and therefore self-aligned to each other.
13. The method of claim 12 wherein the body region is provided by implanting Boron ions into the substrate, and wherein the enhanced drift region is provided by implanting phosphorous ions that are self-aligned with the gate region into the substrate.
14. The method of claim 12 further comprising providing a drain region in the enhanced drift region and providing a source region in the body region.
15. The method of claim 14 wherein the drain region is entirely within the enhanced drift region and the enhanced drift region is under the entire drain region.
16. The method of claim 15 further comprising providing a layer, well, or substrate under the enhanced drift region and the body region, wherein the layer, well, or substrate has the same conductivity type as the enhanced drift region.
17. The method of claim 12 wherein the conductivity type of the enhanced drift region N-type.
18. The method of claim 12 wherein the conductivity type of the enhanced drift region P-type.
19. The method of claim 12 wherein the providing of the enhanced drift region is performed after the body region has been provided on the substrate.
20. The method of claim 12 wherein the body region extends on the substrate away from a first side of the gate region, and the enhanced drift region extends on the substrate away from a second side of the gate region opposite to the first side.