IP Library Granted Patent US 7,635,649
Granted Patent B2
US 7,635,649 · App. 11/605,552 · Granted Dec 22, 2009

Method for manufacturing semiconductor device

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Quick Facts
Patent No.
US 7,635,649
App. No.
11/605,552
Granted
Dec 22, 2009
Kind
B2
Abstract

A method for manufacturing a semiconductor device is provided. The method includes forming a polysilicon layer on a semiconductor substrate, forming an anti-reflection coating on the polysilicon layer, forming a photoresist (PR) layer pattern on the anti-reflection coating, etching the anti-reflection coating using the PR layer pattern as a mask in capacitive coupled plasma (CCP) equipment using CF 4 , Ar, and O 2 , so as to cause a reaction by-product generated by etching the anti-reflect coating to be deposited on sidewalls of the PR layer pattern, thereby forming spacers, and etching the polysilicon layer using the PR layer pattern and the spacers as a mask.

Claims (24)

1. A method for manufacturing a semiconductor device, the method comprising:

forming a polysilicon layer on a semiconductor substrate; forming an anti-reflection coating on the polysilicon layer;

forming a photoresist (PR) layer pattern on the anti-reflection coating;

etching the anti-reflection coating using the PR layer pattern as a mask, so as to cause a reaction by-product generated by the etching of the anti-reflection coating to be deposited on sidewalls of the PR layer pattern, thereby forming spacers;

removing the reaction by-product from polysilicon layer; and

etching the polysilicon layer using the PR layer pattern and the spacers as a mask after removing the reaction by-product.

2. The method as claimed in claim 1 , wherein the reaction by-product is removed by ion sputtering.

3. The method as claimed in claim 2 , wherein the ion sputtering uses a reactive gas based on argon (Ar) and fluorocarbon.

4. The method as claimed in claim 2 , wherein the ion sputtering uses CF 4 having a flow rate from 50 sccm to 200 sccm, and argon (Ar) having a flow rate from 50 sccm to 200 sccm.

5. The method as claimed in claim 1 , wherein the anti-reflection coating is etched in capacitive coupled plasma (CCP) equipment.

6. The method as claimed in claim 5 , wherein the anti-reflection coating is etched under conditions of: Power from 500 W to 1000 W; Duration from 10 seconds to 20 seconds; Pressure from 40 mT to 70 mT; and Flow rate from 60 sccm to 100 sccm CF 4 , from 100 sccm to 150 sccm Ar, and from 5 sccm to 15 sccm O 2 .

7. The method as claimed in claim 5 , wherein the anti-reflection coating is etched using a plasma source spaced apart from the semiconductor substrate by a distance from 20 mm to 30 mm.

8. The method as claimed in claim 1 , wherein, the spacers are formed under conditions of: Power from 500 W to 1000 W; Duration from 15 seconds to 30 seconds; Pressure from 20 mT to 50 mT; and Flow rate from 10 sccm to 30 sccm C 5 F 8 , from 2 sccm to 10 sccm CH 2 F 2 , from 50 sccm to 100 sccm Ar, and from 0 sccm to 5 sccm O 2 .

9. The method as claimed in claim 1 , wherein the spacers are formed in CCP equipment using a plasma source spaced apart from the semiconductor substrate by a distance from 25 mm to 30 mm.

10. A method for manufacturing a semiconductor device, the method comprising:

forming a polysilicon layer on a semiconductor substrate;

forming an anti-reflection coating on the polysilicon layer;

forming a photoresist (PR) layer pattern on the antireflection coating;

etching the anti-reflection coating using the PR layer pattern as a mask so as to cause a reaction by-product generated by etching the anti-reflection coating to be deposited on sidewalls of the PR layer pattern, thereby forming spacers, wherein the etching comprises performing an anti-reflective coating etching process with capacitive coupled plasma (CCP) equipment using CF 4 , Ar, and O 2 ;

removing the reaction by-product from the polysilicon layer; and

etching the polysilicon layer using the PR layer pattern and the spacers as a mask after removing the reaction by-product.

11. The method as claimed in claim 10 , wherein removing the reaction by-product from the polysilicon layer comprises using a reactive gas based on argon (Ar) and fluorocarbon by means of ion sputtering.

12. The method as claimed in claim 11 , wherein the ion sputtering uses CF 4 and Ar.

13. The method as claimed in claim 10 , wherein during the etching of the antireflection coating, the causing of the reaction-by product to be deposited on sidewalls of the PR layer pattern, thereby forming spacers, is performed using C 5 F 8 , CH 2 F 2 , Ar, and O 2 .

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2019
From: DB HITEK CO., LTD.
To: COLUMBA TECHNOLOGIES INC.
Reel/Frame 049709/0857 →
CHANGE OF NAME Recorded Nov 30, 2017
From: DONGBU HITEK CO., LTD.
To: DB HITEK CO., LTD
Reel/Frame 044555/0913 →
MERGER AND CHANGE OF NAME Recorded Nov 29, 2017
From: DONGBU ELECTRONICS CO., LTD.; DONGBU HITEK CO., LTD.
To: DONGBU HITEK CO., LTD.
Reel/Frame 044533/0523 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 4, 2007
From: JANG, JEONG YEL
To: DONGBU ELECTRONICS, CO. LTD.,
Reel/Frame 018704/0919 →