Method and system of frequency domain equalization
A method and system of frequency domain equalization. In an embodiment, the frequency domain equalizer system includes a transmit driver. A receiver decision circuit is communicatively coupled to the transmit driver. The receiver decision circuit may have an input signal and an output signal. An all-pass filter may be communicatively coupled to the transmit driver and the receiver decision circuit. The all-pass filter having an all-pass input signal which comprises an integration of a summation of the receiver decision circuit input signal and the receiver decision circuit output signal, each signal being acted upon by at least one band-pass filter.
1. A frequency domain equalizer system, comprising:
a transmit driver;
a receiver decision circuit communicatively coupled to the transmit driver, the receiver decision circuit having a receiver decision circuit input signal and a receiver decision circuit output signal;
an all-pass filter communicatively coupled to the transmit driver and the receiver decision circuit, the all-pass filter having an all-pass input signal;
a first band-pass filter, a second band-pass filter, a third band-pass filter, and a fourth band-pass filter, the first band-pass filter and the third band-pass filter each acting upon the receiver decision circuit input signal and the second and the fourth band-pass filter each acting upon the receiver decision circuit output signal; and
a first summing circuit and a second summing circuit, the first summing circuit configured for summation of a first band-pass filter output signal and a second band-pass filter output signal, the second summing circuit configured for summation of a third band-pass filter output signal and a fourth band-pass filter output signal,
wherein the all-pass filter input signal comprises a first integration of a first summation by the first summing circuit and a second integration of a second summation by the second summing circuit, and at least one of a first rise time or a first duty cycle of the transmit driver is approximately equivalent to at least one of a second rise time or a second duty cycle of the receiver decision circuit.
2. A frequency domain equalizer system as claimed in claim 1 , wherein the receiver decision circuit input signal and the receiver decision circuit output signal are adjusted so that the difference between the receiver decision circuit input signal and the receiver decision circuit output signal is approximately zero.
3. A frequency domain equalizer system as claimed in claim 1 , wherein the all-pass filter is communicatively coupled to the transmit driver via a channel.
4. A frequency domain equalizer system as claimed in claim 1 , wherein the all-pass filter is a multiple pole/multiple zero all-pass filter.
5. The frequency domain equalizer system as claimed in claim 1 , further comprising an amplifier which amplifies an external signal supplied by the transmit driver.
6. The frequency domain equalizer system as claimed in claim 1 , wherein at least one of the first band-pass filter, the second band-pass filter, the third band-pass filter, or the fourth band-pass filter is a Butterworth band-pass filter.
7. The frequency domain equalizer system as claimed in claim 1 , wherein the first integration is performed by a first integrator, and the second integration is performed by a second integrator.
8. The frequency domain equalizer system as claimed in claim 1 , wherein the first band-pass filter and the second band-pass filter are configured to pass a signal at a frequency that is different than a frequency that the third band-pass filter and the fourth band-pass filter are configured to pass.
9. A method for frequency domain equalization using a frequency domain equalizer in a communication system, comprising:
transmitting a first data signal by a transmit driver to a receiver decision circuit, a first band-pass filter, and a third band-pass filter;
receiving the first data signal by the receiver decision circuit;
transmitting a second data signal from the receiver decision circuit to a second band-pass filter and a fourth band-pass filter;
integrating a first summation of a first band-pass filter output signal and a second band-pass filter output signal;
integrating a second summation of a third band-pass filter output signal and a fourth band-pass filter output signal;
transmitting the integrated first summation and the integrated second summation to an all-pass filter; and
adjusting the first data signal and the second data signal so that a frequency signal spectrum difference between the first data signal and the second data signal is approximately zero.
10. The method as claimed in claim 9 , wherein the first data signal is transmitted to the receiver decision circuit via a channel communicatively coupled to the transmit driver and the receiver decision circuit.
11. The method as claimed in claim 9 , wherein the first summation is performed by a first summing circuit, and the second summation is performed by a second summing circuit.
12. The method as claimed in claim 9 , wherein the all-pass filter is a multiple pole/multiple zero all-pass filter.
13. The method as claimed in claim 9 , wherein at least one of the first band-pass filter, the second band-pass filter, the third band-pass filter, or the fourth band-pass filter is a Butterworth band-pass filter.
14. The method as claimed in claim 9 , wherein a rise time and a duty cycle of the transmit driver are approximately equivalent to a rise time and a duty cycle of the receiver decision circuit.
15. The method as claimed in claim 9 , further comprising amplifying the first data signal by an amplifier.
16. A frequency domain equalization system, comprising:
means for transmitting a first data signal to a receiver decision circuit, a first band-pass filter, and a third band-pass filter;
means for transmitting a second data signal from the receiver decision circuit to a second band-pass filter and a fourth band-pass filter;
means for integrating a first summation of a first band-pass filter output signal and a second band-pass filter output signal;
means for integrating a second summation of a third band-pass filter output signal and a fourth band-pass filter output signal;
means for adjusting the first data signal and the second data signal so that a frequency signal spectrum difference between the first data signal and the second data signal is approximately zero; and
means for transmitting the integrated first summation and the integrated second summation to the means for adjusting the first data signal and the second data signal,
wherein at least one of a rise time or a duty cycle of the means for transmitting the first data signal is approximately equivalent to at least one of a rise time or a duty cycle of the receiver decision circuit.
17. The frequency domain equalization system as claimed in claim 16 , wherein the means for adjusting the first data signal and the second data signal is an all-pass filter.
18. The frequency domain equalization system as claimed in claim 17 , wherein the all-pass filter is a multiple pole/multiple zero all-pass filter.
19. The frequency domain equalization system as claimed in claim 16 , wherein at least one of the first band-pass filter, the second band-pass filter, the third band-pass filter, or the fourth band-pass filter is a Butterworth band-pass filter.