Patent Assignment
Reel/Frame 020548/0977
MERGER
Recorded: 2008-02-19
Received: 2008-02-19
Pages: 20
Assignor
LSI SUBSIDIARY CORP.
Executed: 2007-04-04
Assignee
LSI CORPORATION
1621 BARBER LANE, MILPITAS, CA, 95035, UNITED STATES
Covered Applications
(100)
METHOD AND APPARATUS FOR VIDEO DEINTERLACING AND FORMAT CONVERSION
App. No. 12/025,233
→
METHOD FOR REDIRECTING VOID DIFFUSION AWAY FROM VIAS IN AN INTEGRATED CIRCUIT DESIGN
App. No. 12/018,849
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METHOD FOR VIDEO DEINTERLACING AND FORMAT CONVERSION
App. No. 12/018,544
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TIME-SLOT INTERCHANGE CIRCUIT
App. No. 12/014,162
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SUPPORTING MOTION VECTORS OUTSIDE PICTURE BOUNDARIES IN MOTION ESTIMATION PROCESS
App. No. 12/014,317
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SPACER-LESS TRANSISTOR INTEGRATION SCHEME FOR HIGH-K GATE DIELECTRICS AND SMALL GATE-TO-GATE SPACES APPLICABLE TO SI, SIGE AND STRAINED SILICON SCHEMES
App. No. 11/960,554
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METHOD AND SYSTEM FOR VALIDATING PCI/PCI-X ADAPTERS
App. No. 11/999,300
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REAL TIME SCENE CHANGE DETECTION IN VIDEO SEQUENCES
App. No. 11/950,093
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TIMING VIOLATION DEBUGGING INSIDE PLACE AND ROUTE TOOL
App. No. 11/946,243
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FABRICATION OF STRAINED SILICON FILM VIA IMPLANTATION AT ELEVATED SUBSTRATE TEMPERATURES
App. No. 11/941,324
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METHOD OF TREATING METAL AND METAL SALTS TO ENABLE THIN LAYER DEPOSITION IN SEMICONDUCTOR PROCESSING
App. No. 11/939,482
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MULTI-STANDARD VARIABLE BLOCK SIZE MOTION ESTIMATION PROCESSOR
App. No. 11/937,632
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METHODS AND STRUCTURE FOR DETECTION AND HANDLING OF CATASTROPHIC SCSI ERRORS
App. No. 11/924,813
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Systems and Methods for Improving Network Performance
App. No. 11/923,732
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MEMORY MAPPING FOR PARALLEL TURBO DECODING
App. No. 11/924,385
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METHODS AND STRUCTURES FOR IMPROVED BUFFER MANAGEMENT AND DYNAMIC ADAPTATION OF FLOW CONTROL STATUS IN HIGH-SPEED COMMUNICATION NETWORKS
App. No. 11/873,585
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METHOD, SYSTEM AND PROGRAMMING LANGUAGE FOR DEVICE DIAGNOSTICS AND VALIDATION
App. No. 11/974,600
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FUEL CELL BASED BATTERY BACKUP APPARATUS FOR STORAGE SUBSYSTEMS
App. No. 11/863,688
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APPARATUS FOR CONFINING INDUCTIVELY COUPLED SURFACE CURRENTS
App. No. 11/856,196
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NQL - NETLIST QUERY LANGUAGE
App. No. 11/832,516
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METHOD AND/OR APPARATUS FOR REDUCING THE COMPLEXITY OF H.264 B-FRAME ENCODING USING SELECTIVE RECONSTRUCTION
App. No. 11/879,944
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METHOD AND SYSTEM FOR PERFORMING BUILT-IN-SELF-TEST ROUTINES USING AN ACCUMULATOR TO STORE FAULT INFORMATION
App. No. 11/824,264
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OPTIMIZED MIRROR DESIGN FOR OPTICAL DIRECT WRITE
App. No. 11/769,486
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MULTI-LAYER REGISTRATION AND DIMENSIONAL TEST MARK FOR SCATTEROMETRICAL MEASUREMENT
App. No. 11/768,725
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APPARATUS AND METHOD FOR BUILDING, STORING, UPLOADING, RELOCATING AND EXECUTING DOS BASED SOFTWARE MODULE DURING SYSTEM STARTUP TIME
App. No. 11/821,622
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INTEGRATED CIRCUIT WITH INDUCTOR HAVING HORIZONTAL MAGNETIC FLUX LINES
App. No. 11/811,519
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DIGITAL GAUSSIAN NOISE SIMULATOR
App. No. 11/758,975
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RAMPTIME PROPAGATION ON DESIGNS WITH CYCLES
App. No. 11/757,229
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DENSITY DRIVEN LAYOUT FOR RRAM CONFIGURATION MODULE
App. No. 11/757,200
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MULTI-STEP PROCESS FOR FORMING A BARRIER FILM FOR USE IN COPPER LAYER FORMATION
App. No. 11/733,673
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Planarization with reduced dishing
App. No. 11/695,169
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CONVERTER CIRCUIT FOR CONVERTING 1-REDUNDANT REPRESENTATION OF AN INTEGER
App. No. 11/689,924
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CUSTOMIZABLE DEVELOPMENT AND DEMONSTRATION PLATFORM FOR STRUCTURED ASICS
App. No. 11/724,663
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METHOD OF GENERATING TEST PATTERNS TO EFFICIENTLY SCREEN INLINE RESISTANCE DELAY DEFECTS IN COMPLEX ASICS
App. No. 11/682,914
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METHOD AND/OR APPARATUS FOR COLOR SPACE REDUCTION FOR TRANSCODING SUBPICTURE ELEMENTS
App. No. 11/712,113
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SEQUENTIAL TESTER FOR LONGEST PREFIX SEARCH ENGINES
App. No. 11/706,943
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METHOD AND/OR APPARATUS FOR VIDEO DATA STORAGE
App. No. 11/590,516
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METHOD OF SELECTING CELLS IN LOGIC RESTRUCTURING
App. No. 11/551,573
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SYSTEM, METHOD AND COMPUTER PROGRAM FOR FACET ANALYSIS
App. No. 11/550,457
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SYSTEM AND METHOD FOR CONNECTING SAS RAID CONTROLLER DEVICE CHANNELS ACROSS REDUNDANT STORAGE SUBSYSTEMS
App. No. 11/545,872
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FAILURE ANALYSIS VEHICLE FOR YIELD ENHANCEMENT WITH SELF TEST AT SPEED BURNIN CAPABILITY FOR RELIABILITY TESTING
App. No. 11/527,108
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APPARATUS AND METHOD OF MANUFACTURE FOR INTEGRATED CIRCUIT AND CMOS DEVICE INCLUDING EPITAXIALLY GROWN DIELECTRIC ON SILICON CARBIDE
App. No. 11/524,107
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SYSTEM AND METHOD FOR TRANSMIT TIMING PRECOMPENSATION FOR A SERIAL TRANSMISSION COMMUNICATION CHANNEL
App. No. 11/523,784
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IDENTIFICATION OF UNCOMMITTED MEMORY BLOCKS DURING AN INITIALIZATION PROCEDURE
App. No. 11/530,397
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COMPLEX-ADAPTIVE SYSTEM FOR PROVIDING A FACETED CLASSIFICATION
App. No. 11/469,258
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METHODS AND APPARATUS FOR IMPROVED RAID 1 MIRROR RE-SYNCHRONIZATION
App. No. 11/508,473
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TECHNIQUES FOR FORMING PASSIVE DEVICES DURING SEMICONDUCTOR BACK-END PROCESSING
App. No. 11/506,659
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ENHANCED METHOD OF OPTIMIZING MULTIPLEX STRUCTURES AND MULTIPLEX CONTROL STRUCTURES IN RTL CODE
App. No. 11/460,680
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SELF-ALIGNING ELECTROMAGNETIC INTERFERENCE GASKETS FOR CUSTOMER REMOVABLE MODULES
App. No. 11/493,260
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METHOD FOR REQUEST TRANSACTION ORDERING IN OCP BUS TO AXI BUS BRIDGE DESIGN
App. No. 11/490,691
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Systems and methods for analyzing data of a SAS/SATA device
App. No. 11/485,799
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Decomposer for parallel turbo decoding, process and integrated circuit
App. No. 11/455,903
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Abrasive Electrolyte
App. No. 11/423,686
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REDUCING A PARASITIC GRAPH IN MOMENT COMPUTATION ALGORITHMS IN VLSI SYSTEMS
App. No. 11/421,722
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METHOD AND APPARATUS FOR AUTOMATIC CREATION AND PLACEMENT OF A FLOOR-PLAN REGION
App. No. 11/438,644
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APPARATUS FOR WAFER PATTERNING TO REDUCE EDGE EXCLUSION ZONE
App. No. 11/383,171
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Methods and/or apparatus for link optimization
App. No. 11/418,702
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ISOLATED METAL PLUG PROCESS FOR USE IN FABRICATING CARBON NANOTUBE MEMORY CELLS
App. No. 11/429,069
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DUAL LAYER BARRIER FILM TECHNIQUES TO PREVENT RESIST POISONING
App. No. 11/418,873
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Adjustable Transmission Phase Shift Mask
App. No. 11/381,409
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Method to improve the control of electro-polishing by use of a plating electrode in an electrolyte bath
App. No. 11/409,377
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AMBA MODULAR MEMORY CONTROLLER
App. No. 11/402,102
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INTERDIGITATED MESH TO PROVIDE DISTRIBUTED, HIGH QUALITY FACTOR CAPACITIVE COUPLING
App. No. 11/397,252
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Modular, scalable storage controller midplane connector
App. No. 11/377,472
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METHOD AND APPARATUS FOR INJECTING ERRORS INTO SAS DOMAINS THROUGH SAS EXPANDERS
App. No. 11/360,103
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Process method for achieving uniform stress free electro-polishing across a copper plated wafer
App. No. 11/359,734
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APPARATUS AND METHODS FOR POWER MANAGEMENT AND SPIN-UP IN A STORAGE SYSTEM
App. No. 11/355,631
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CDM ESD EVENT SIMULATION AND REMEDIATION THEREOF IN APPLICATION CIRCUITS
App. No. 11/349,358
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CDM ESD EVENT PROTECTION IN APPLICATION CIRCUITS
App. No. 11/349,356
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ACTIVE CURRENT CANCELLATION FOR HIGH PERFORMANCE VIDEO CLAMPS
App. No. 11/345,929
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POWER CONFIGURATION METHOD FOR STRUCTURED ASICS
App. No. 11/334,870
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PEER-TO-PEER LICENSE TRACKING AND CONTROL
App. No. 11/328,700
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HYBRID MULTIPLE BIT-DEPTH VIDEO PROCESSING ARCHITECTURE
App. No. 11/325,291
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METHOD AND APPARATUS FOR DIVERTING VOID DIFFUSION IN INTEGRATED CIRCUIT CONDUCTORS
App. No. 11/323,398
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METHOD AND SAMPLE FOR RADIATION MICROSCOPY INCLUDING A PARTICLE BEAM CHANNEL FORMED IN THE SAMPLE SOURCE
App. No. 11/323,405
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METHOD AND END CELL LIBRARY FOR AVOIDING SUBSTRATE NOISE IN AN INTEGRATED CIRCUIT
App. No. 11/324,105
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APPLYING A TRANSFER FUNCTION TO A SIGNAL FOR DETERMINING COMPLIANCE TO A SPECIFICATION
App. No. 11/323,595
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METHOD AND APPARATUS FOR DETECTING DEFECTS IN INTEGRATED CIRCUIT DIE FROM STIMULATION OF STATISTICAL OUTLIER SIGNATURES
App. No. 11/324,084
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SIMULTANEOUS DISPLAY OF EYE DIAGRAM AND JITTER PROFILE DURING DEVICE CHARACTERIZATION
App. No. 11/323,935
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ISOLATED POWER DOMAIN CORE REGIONS IN PLATFORM ASICS
App. No. 11/318,332
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Drive slot shutters for drive enclosures
App. No. 11/315,913
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WEB-ENABLED SOLUTIONS FOR MEMORY COMPILATION TO SUPPORT PRE-SALES ESTIMATION OF MEMORY SIZE, PERFORMANCE AND POWER DATA FOR MEMORY COMPONENTS
App. No. 11/315,959
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Variable mask field exposure
App. No. 11/314,649
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Reducing power noise in differential drivers
App. No. 11/314,855
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SYSTEM AND METHOD FOR IMPLEMENTING A STORAGE PROTOCOL WITH INITIATOR CONTROLLED DATA TRANSFER
App. No. 11/312,080
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SELF-ALIGNED CELL INTEGRATION SCHEME
App. No. 11/312,849
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PCML driver for LVDS receiver loads
App. No. 11/314,768
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Methods and structure for improved migration of raid logical volumes
App. No. 11/305,992
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AUTOMATION OF TIE CELL INSERTION, OPTIMIZATION AND REPLACEMENT BY SCAN FLIP-FLOPS TO INCREASE FAULT COVERAGE
App. No. 11/311,515
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METHODS AND STRUCTURE FOR IMPROVED IMPORT/EXPORT OF RAID LEVEL 6 VOLUMES
App. No. 11/311,523
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METHOD AND SYSTEM FOR IMPROVING AERIAL IMAGE SIMULATION SPEEDS
App. No. 11/305,542
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TESTING HIGH FREQUENCY SIGNALS ON A TRACE
App. No. 11/305,749
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MEMORY ENCRYPTION FOR DIGITAL VIDEO
App. No. 11/303,506
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ELECTROSTATIC DISCHARGE SERIES PROTECTION
App. No. 11/300,938
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METHOD OF ALIGNING DEPOSITED NANOTUBES ONTO AN ETCHED FEATURE USING A SPACER
App. No. 11/304,871
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SEMICONDUCTOR PACKAGE HAVING INCREASED RESISTANCE TO ELECTROSTATIC DISCHARGE
App. No. 11/304,862
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UNIFIED MEMORY ARCHITECTURE FOR RECORDING APPLICATIONS
App. No. 11/299,506
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METHOD FOR REDUCING REBUILD TIME ON A RAID DEVICE
App. No. 11/295,344
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SYSTEM AND METHOD FOR SEGMENTATION OF MACROBLOCKS
App. No. 11/293,404
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System and method for amplitude optimization in high-speed serial transmissions
App. No. 11/290,786
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