IP Library Granted Patent US 7,551,414
Granted Patent B2
US 7,551,414 · App. 11/300,938 · Granted Jun 23, 2009

Electrostatic discharge series protection

Assignee: LSI Corporation
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Quick Facts
Patent No.
US 7,551,414
App. No.
11/300,938
Granted
Jun 23, 2009
Kind
B2
Abstract

An improvement to a digital integrated circuit of the type having a functional circuit that is susceptible to damage from an electrostatic discharge. An electrostatic discharge protection element is placed in series with the functional circuit and disposed upstream in a normal direction of current flow from the functional circuit. The electrostatic discharge protection element includes at least one of a resistive choke that exhibits thermal runaway and an inductive choke.

Claims (8)

1. In a digital integrated circuit of the type having a functional circuit that is susceptible to damage from an electrostatic discharge event, the improvement comprising an electrostatic discharge protection element placed in series with the functional circuit and disposed upstream in a normal direction of current flow from the functional circuit, the electrostatic discharge protection element comprising:

a resistive choke that exhibits thermal runaway and formed of (1 ) a material having a relatively high temperature coefficient of resistance, from which the resistive choke is formed, (2) a material having a relatively low thermal conductivity, within which the resistive choke is immediately disposed, and (3) a pinch point that creates a relatively high current density within the pinch point of the resistive choke, and

an inductive choke in series with the resistive choke, and formed of a transmission line with dead-end electrically conductive stubs disposed along its length.

2. The integrated circuit of claim 1 , wherein the electrostatic discharge protection element is disposed on a common monolithic substrate with the integrated circuit.

3. The integrated circuit of claim 1 , wherein the electrostatic discharge protection element is disposed on a package substrate on which the integrated circuit is packaged.

4. The integrated circuit of claim 1 , wherein the electrostatic discharge protection element is disposed between the integrated circuit and a package substrate on which the integrated circuit is packaged.

5. The integrated circuit of claim 1 , wherein the electrostatic discharge protection element includes a parallel shunt impedance element.

6. The integrated circuit of claim 1 , wherein the material having a relatively high temperature coefficient of resistance in the resistive choke comprises at least one of copper, polysilicon, salicided polysilicon, and tungsten.

Assignments (8)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
CHANGE OF NAME Recorded Jun 6, 2014
From: LSI LOGIC CORPORATION
To: LSI CORPORATION
Reel/Frame 033102/0270 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
MERGER Recorded Feb 19, 2008
From: LSI SUBSIDIARY CORP.
To: LSI CORPORATION
Reel/Frame 020548/0977 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2005
From: LOH, WILLIAM M.; ITO, CHOSHU; CHEN, JAU-WEN
To: LSI LOGIC CORPORATION
Reel/Frame 017380/0286 →
Continuity (1)
Related Publication 20070138973A1 · Jun 21, 2007