Integrated circuit with inductor having horizontal magnetic flux lines
View Patent ↗An integrated circuit (IC) includes one or more inductors that have magnetic flux lines substantially parallel to a generally horizontal plane of the IC. The inductor is formed in a plurality of conductor layers separated by insulating layers of the IC. Regions of highest magnetic flux density of the inductor may preferably be located near the edge of the IC. Additionally, the inductor may preferably be segmented. The over-all inductance may preferably be controlled by turning on and off selected inductors or inductor segments.
1. A method of fabricating an integrated circuit having conductor layers separated by insulating layers arranged substantially parallel to a plane of the integrated circuit, comprising:
forming an inductor within the conductor layers and the insulating layers by:
forming a first segment of the inductor having a coil-shape in a first spiraling angular direction;
forming a second segment of the inductor proximate to and spaced apart from the first segment and having a coil-shape in a second spiraling angular direction; and
electrically connecting the first segment and the second segment;
and wherein the inductor has magnetic flux lines substantially parallel to the plane of the integrated circuit upon operation of the integrated circuit.
2. A method of fabricating an integrated circuit having conductor layers separated by insulating layers arranged substantially parallel to a plane of the integrated circuit, the integrated circuit including other components for performing functions of the integrated circuit, comprising:
forming an inductor within the conductor layers and the insulating layers by forming a first segment of the inductor, forming a second segment of the inductor proximate to and spaced apart from the first segment, and electrically connecting the first segment and the second segment, the inductor having magnetic flux lines substantially parallel to the plane of the integrated circuit upon operation of the integrated circuit; and
forming conductors between the first segment and the second segment, the conductors electrically connecting the other components of the integrated circuit.
3. A method of fabricating an integrated circuit having conductor layers separated by insulating layers arranged substantially parallel to a plane of the integrated circuit, comprising:
forming an inductor within the conductor layers and the insulating layers and having magnetic flux lines substantially parallel to the plane of the integrated circuit upon operation of the integrated circuit;
and wherein:
the inductor includes an end;
the integrated circuit includes an edge; and
the step of forming the inductor further comprises
forming the inductor with the end thereof proximate to the edge of the integrated circuit.
4. A method as defined in claim 3 wherein:
the aforementioned edge of the integrated circuit is a first edge;
the integrated circuit includes a second edge opposite the first edge;
the aforementioned end of the inductor is a first end;
the inductor includes a second end opposite the first end; and
the step of forming the inductor further comprises:
forming the inductor with the first end thereof proximate to the first edge of the integrated circuit and the second end of the inductor proximate to the second edge of the integrated circuit.
5. A method as defined in claim 3 wherein:
the magnetic flux lines of the inductor have a greatest density at the end of the inductor proximate to the edge of the integrated circuit upon operation of the integrated circuit.
6. A method of fabricating an integrated circuit having conductor layers separated by insulating layers arranged substantially parallel to a plane of the integrated circuit, comprising:
forming a first inductor within the conductor layers and the insulating layers and having magnetic flux lines substantially parallel to the plane of the integrated circuit upon operation of the integrated circuit; and
forming a second inductor within the conductor layers and the insulating layers and having magnetic flux lines substantially parallel to the plane of the integrated circuit upon operation of the integrated circuit, the second inductor being substantially similar to the first inductor and offset laterally and longitudinally from the first inductor.
7. A method of fabricating an integrated circuit having conductor layers separated by insulating layers arranged substantially parallel to a plane of the integrated circuit, comprising:
forming a first inductor within the conductor layers and the insulating layers and having magnetic flux lines substantially parallel to the plane of the integrated circuit upon operation of the integrated circuit;
forming a plurality of inductors similar to the first inductor, each of the inductors having an inductance;
electrically connecting the inductors in a series in which each inductor, except a last inductor in the series, is followed by at least one inductor subsequent thereto and each inductor, except an initial inductor in the series, is preceded by at least one inductor;
electrically connecting the inductors with a plurality of switch devices, each switch device corresponding to at least one of the inductors, each switch device turning off the corresponding inductor and any inductors subsequent to the corresponding inductor when the switch device is in a first state, each switch device turning on the corresponding inductor when the switch device and the switch devices corresponding to any inductors preceding the corresponding inductor are in a second state, each of the inductors adding to an over-all inductance of the plurality of inductors when turned on;
selecting the over-all inductance of the plurality of inductors by selecting at least a portion of the inductors; and
setting the over-all inductance of the plurality of inductors by having in the first state at least one switch device for which the corresponding inductor and any subsequent inductors thereof are not selected.
8. A method of fabricating an integrated circuit having conductor layers separated by insulating layers arranged substantially parallel to a plane of the integrated circuit, comprising:
forming a first inductor within the conductor layers and the insulating layers and having magnetic flux lines substantially parallel to the plane of the integrated circuit upon operation of the integrated circuit;
forming a plurality of inductors similar to the first inductor, each of the inductors having an inductance;
electrically connecting the inductors with a plurality of switch devices, each switch device corresponding to one of the inductors and turning off the corresponding inductor when in a first state and turning on the corresponding inductor when in a second state, each of the inductors adding to an over-all inductance of the plurality of inductors when turned on;
selecting the over-all inductance of the plurality of inductors by selecting at least a portion of the inductors; and
setting the over-all inductance of the plurality of inductors by having in the first state any switch devices that correspond to any inductors that are not selected and having in the second state any switch devices that correspond to any inductors that are selected.