IP Library Granted Patent US 7,704,821
Granted Patent B2
US 7,704,821 · App. 11/146,826 · Granted Apr 27, 2010

In-situ nitridation of high-k dielectrics

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Quick Facts
Patent No.
US 7,704,821
App. No.
11/146,826
Granted
Apr 27, 2010
Kind
B2
Abstract

A semiconductor fabrication process for forming a gate dielectric includes depositing a high-k dielectric stack including incorporating nitrogen into the high-k dielectric stack in-situ. A top high-k dielectric is formed overlying the dielectric stack and the dielectric stack and the top dielectric are annealed. Depositing the dielectric stack includes depositing a plurality of high-k dielectric layers where each layer is formed in a distinct processing step or set of steps. Depositing one of the dielectric layers includes performing a plurality of atomic layer deposition processes to form a plurality of high-k sublayers, wherein each sublayer is a monolayer film. Depositing the plurality of sublayers includes depositing a nitrogen free sublayer and depositing a nitrogen bearing sublayer. Depositing the nitrogen free sublayer includes pulsing an ALD chamber with HfCl 4 , purging the chamber with an inert, pulsing the chamber with an H 2 O or D 2 O, and purging the chamber with an inert.

Claims (25)

1. A method for forming a nitrided gate dielectric for a transistor, comprising:

depositing a metal oxide high-k film on a semiconductor substrate by pulsing an atomic layer deposition chamber containing the semiconductor substrate with a metal-halide and thereafter pulsing the chamber with an oxidant;

forming a high-k layer overlying the metal oxide high-k film, wherein forming the high-k layer comprises depositing a sublayer consisting of a metal nitride by pulsing the chamber with the metal halide and thereafter pulsing the chamber with NH 3 or ND 3 , the high-k layer comprising a high-k dielectric material having a dielectric constant (k) of at least 8; and

selecting a value for M wherein the value represents a desired amount of nitrogen within the high-k layer, and repeating the step of depositing the sublayer until the high-k layer has an amount of nitrogen equal to the value of M.

2. The method of claim 1 , wherein the metal oxide film and the sublayer comprise monolayer films.

3. The method of claim 1 , wherein the metal halide is HfCl4.

4. The method of claim 1 , wherein the oxidant is D2O.

5. The method of claim 1 , further comprising purging the chamber with an inert species between said pulsing with the metal halide and said pulsing with the oxidant and purging the chamber with an inert species between said pulsing with the metal halide and said pulsing with the NH3 or ND3.

6. The method of claim 5 , further comprising depositing a HfO 2 capping layer on the high-k layer.

7. A method for forming a nitrided gate dielectric for a transistor, comprising:

(i) depositing a metal oxide high-k film on a semiconductor substrate by pulsing an atomic layer deposition chamber containing the semiconductor substrate with a metal-halide and thereafter pulsing the chamber with an oxidant;

(ii) selecting a value for a variable M, wherein the value of M is representative of a desired concentration of nitrogen in a high-k layer to be formed, the high-k layer comprising a high-k dielectric material having a dielectric constant (k) of at least 8;

(iii) forming a high-k layer overlying the metal oxide high-k film, wherein forming the high-k layer comprises depositing a sublayer consisting of a metal nitride by pulsing the chamber with the metal halide and thereafter pulsing the chamber with NH 3 or ND 3 and incrementing the value of a variable J, wherein the variable J represents a count of the number of sublayers formed; and

(iv) repeating step (iii) until the value of a variable J is equal to the value of the variable M.

8. The method of claim 7 , wherein the metal oxide high-k film and the sublayer comprise monolayer films.

9. The method of claim 7 , wherein the metal halide is HfCl4.

10. The method of claim 7 , wherein the oxidant is D2O.

11. The method of claim 7 , further comprising purging the chamber with an inert species between said pulsing with the metal halide and said pulsing with the oxidant and purging the chamber with an inert species between said pulsing with the metal halide and said pulsing with the NH3 or ND3.

12. The method of claim 11 , further comprising depositing a HfO 2 capping layer on the high-k layer.

13. A method for forming a nitrided gate dielectric for a transistor, comprising:

(i) depositing a metal oxide high-k film on a semiconductor substrate by pulsing an atomic layer deposition chamber containing the semiconductor substrate with a metal-halide and thereafter pulsing the chamber with an oxidant;

(ii) selecting a value for a variable M, wherein the value of M is representative of a desired concentration of nitrogen in a first high-k layer to be formed, the high-k layer comprising a high-k dielectric material having a dielectric constant (k) of at least 8;

(iii) initializing a variable J to a value of 1, wherein the variable J represents a count of the number of sublayers formed;

(iv) forming a first high-k layer overlying the metal oxide high-k film, wherein forming the first high-k layer comprises depositing a sublayer consisting of a metal nitride by pulsing the chamber with the metal halide and thereafter pulsing the chamber with NH 3 or ND 3 and incrementing the value of the variable J by 1 after depositing the sublayer; and

(v) repeating step (iv) if the value of J is less than the value of the variable M, until the value of the variable J equals the value of the variable M.

Assignments (26)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
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From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
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CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
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RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
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PATENT RELEASE Recorded Dec 21, 2015
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SECURITY AGREEMENT Recorded Nov 6, 2013
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