IP Library Granted Patent US 7,728,361
Granted Patent B2
US 7,728,361 · App. 12/113,881 · Granted Jun 1, 2010

Method of testing an integrated circuit die, and an integrated circuit die

Assignee: Silicon Storage Technology, Inc.
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Quick Facts
Patent No.
US 7,728,361
App. No.
12/113,881
Granted
Jun 1, 2010
Kind
B2
Abstract

In the present invention, a method of testing an unpackaged integrated circuit die is disclosed. The die has a plurality of first input/output pads. A serial electrical connection is fabricated in the die between all of the input/output pads of the die which are not of the first plurality (hereinafter: “second plurality”). The second plurality has a start input and an end output. The start input of the second plurality is connected to the output of one selected input buffer of the input pad of the first plurality and the end output of the second plurality is also connected to the input of one selected output pad of the first plurality. The second plurality of input/output pads are tested through selected input pad and selected output pad of the first plurality without electrical probes making contact during the wafer sort. The present invention also relates to an integrated circuit die so fabricated as to facilitate testing.

Claims (8)

1. An integrated circuit die comprising:

a circuit having a first plurality of input/output pads;

an input buffer, having an input and an output, and an output buffer, having an input and an output, for each of the pads of a second plurality of said circuit, wherein said second plurality being less than all of the first plurality;

wherein each pad of said second plurality is connected to the input of the input buffer, and to the output of the output buffer; and an electrical connection connects the output of an input buffer of one pad of the second plurality to the input of an output buffer of an adjacent pad of the second plurality; wherein said second plurality having a first end and a second end; and

an electrical connection connects the first end of said second plurality to an input/output pad of one of said first plurality, which is not one of the second plurality (hereinafter: “third plurality”) and connects the second end of said second plurality to another pad of said third plurality.

2. The die of claim 1 wherein said first plurality of pads are positioned substantially along the periphery of said die.

3. The die of claim 2 , wherein said die is substantially rectilinearly shaped.

4. The die of claim 3 wherein said third plurality of pads are positioned substantially along opposite sides of said rectilinearly shaped die.

Assignments (3)
NUNC PRO TUNC ASSIGNMENT Recorded Aug 3, 2010
From: SILICON STORAGE TECHNOLOGY, INC.
To: GREENLIANT SYSTEMS, INC.
Reel/Frame 024776/0624 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2010
From: GREENLIANT SYSTEMS, INC.
To: GREENLIANT LLC
Reel/Frame 024776/0637 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2008
From: ZHANG, KANGPING; LIN, FONG-LONG
To: SILICON STORAGE TECHNOLOGY, INC.
Reel/Frame 020889/0145 →
Continuity (1)
Related Publication 20090273007A1 · Nov 5, 2009