Integrated circuit including vertical diode

1. An integrated circuit comprising:

a vertical diode;

a silicide contact contacting the vertical diode;

a first electrode coupled to the silicide contact;

a spacer having a first sidewall contacting a first sidewall of the first electrode;

a resistivity changing material coupled to the first electrode; and

a second electrode coupled to the resistivity changing material,

wherein a second sidewall of the spacer is aligned on a line with a sidewall of the vertical diode and a second sidewall of the first electrode.

2. The integrated circuit of claim 1 , wherein the first electrode comprises an etch stop material layer contacting the spacer.

3. The integrated circuit of claim 1 , wherein the first electrode comprises a first electrode material contacting the silicide contact and a second electrode material contacting the resistivity changing material.

4. The integrated circuit of claim 1 , further comprising:

an N+ word line coupled to the diode.

5. The integrated circuit of claim 1 , wherein the resistivity changing material comprises phase change material.

6. The integrated circuit of claim 1 , further comprising:

at least one encapsulation material layer encapsulating the resistivity changing material and the second electrode.

7. An integrated circuit comprising:

a vertical diode including a first polarity region and a second polarity region;

a silicide contact contacting the second polarity region;

a first electrode coupled to the silicide contact;

a spacer having a first sidewall contacting a first sidewall of the first electrode;

a phase change element coupled to the first electrode; and

a second electrode coupled to the phase change element,

wherein a second sidewall of the spacer is aligned on a line with a second sidewall of the first electrode and a sidewall of the vertical diode.

8. The integrated circuit of claim 7 , further comprising:

a word line contacting the first polarity region; and

a bit line coupled to the second electrode.

9. An integrated circuit comprising:

a first polarity region;

a second polarity region contacting the first polarity region;

a silicide contact contacting the second polarity region;

a first electrode coupled to the silicide contact;

a spacer having a first sidewall contacting a first sidewall of the first electrode;

a resistive memory element coupled to the first electrode; and

a second electrode coupled to the resistive memory element,

wherein a second sidewall of the spacer is aligned on a line with a second sidewall of the first electrode, a sidewall of the silicide contact, a sidewall of the second polarity region, and a sidewall of the first polarity region.

10. The integrated circuit of claim 9 , wherein the first electrode comprises an etch stop material layer contacting the spacer.

11. The integrated circuit of claim 9 , wherein the first electrode comprises a first electrode material contacting the silicide contact and a second electrode material contacting the resistive memory element.

12. The integrated circuit of claim 9 , wherein the first polarity region comprises an N− region, and

wherein the second polarity region comprises a P+ region.

13. The integrated circuit of claim 9 , further comprising:

an N+ word line contacting the N− region, the N+ word line having a sidewall self-aligned with the second sidewall of the spacer.

14. The integrated circuit of claim 9 , further comprising:

at least one encapsulation material layer encapsulating the resistive memory element and the second electrode.

15. The integrated circuit of claim 9 , wherein the resistive memory element comprises a phase change element.

16. An integrated circuit comprising:

a vertical diode;

a silicide contact contacting the vertical diode;

a first electrode coupled to the silicide contact, the first electrode having a first sidewall aligned in a line with a first sidewall of the silicide contact; and the first electrode having a second sidewall aligned in a line with a second sidewall of the silicide contact;

a spacer having a first sidewall contacting a third sidewall of the first electrode;

a resistivity changing material coupled to the first electrode; and

a second electrode coupled to the resistivity changing material,

wherein a second sidewall of the spacer is aligned on a line with a sidewall of the vertical diode and the second sidewall of the first electrode.

17. The integrated circuit of claim 16 , wherein the first electrode comprises an etch stop material layer contacting the spacer, the etch stop material layer having a first sidewall aligned in a line with the first sidewall of the silicide contact, and the etch stop material layer having a second sidewall aligned in a line with the second sidewall of the silicide contact.

18. The integrated circuit of claim 16 , wherein the first electrode comprises a first electrode material contacting the silicide contact and a second electrode material contacting the resistivity changing material.

19. The integrated circuit of claim 16 , further comprising:

an N+ word line coupled to the diode.

20. The integrated circuit of claim 16 , wherein the resistivity changing material comprises phase change material.

21. The integrated circuit of claim 16 , further comprising:

at least one encapsulation material layer encapsulating the resistivity changing material and the second electrode; and

a dielectric material laterally surrounding the encapsulation material layer.

22. The integrated circuit of claim 16 , further comprising:

a dielectric material laterally surrounding the vertical diode, the silicide contact, the first electrode, and the spacer.