IP Library › Granted Patent US 7,776,744
Granted Patent B2
US 7,776,744 · App. 11/219,346 · Granted Aug 17, 2010

Pitch multiplication spacers and methods of forming the same

Assignee: Micron Technology, Inc.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,776,744
App. No.
11/219,346
Granted
Aug 17, 2010
Kind
B2
Abstract

Spacers in a pitch multiplication process are formed without performing a spacer etch. Rather, the mandrels are formed over a substrate and then the sides of the mandrels are reacted, e.g., in an oxidization, nitridation, or silicidation step, to form a material that can be selectively removed relative to the unreacted portions of the mandrel. The unreacted portions are selectively removed to leave a pattern of free-standing spacers. The free-standing spacers can serve as a mask for subsequent processing steps, such as etching the substrate.

Claims (23)

1. A method for forming an integrated circuit, comprising:

defining a pattern in a selectively definable layer over a substrate;

transferring the pattern from the selectively definable layer to an underlying layer of temporary material to form a plurality of temporary placeholders in the layer of temporary material across a region over the substrate;

providing a cap layer on a top horizontal surface of the temporary placeholders, wherein the cap layer inhibits reactions on the top horizontal surface and exposes sidewalls of the temporary placeholders;

blanket depositing a layer comprising a solid phase reactant over the cap layer and the temporary placeholders;

converting some of the temporary material into an other material to form a plurality of spacers underneath the cap layer, the spacers forming a plurality of mask features, wherein converting some of the temporary material comprises selectively reacting sidewalls of the temporary placeholders with the solid phase reactant, wherein at least part of the spacers are formed directly under the cap layer, the cap layer and the spacers formed of different materials;

selectively removing the cap layer relative to the spacers;

selectively removing unconverted temporary material between the spacers after removing the cap layer; and

subsequently etching the substrate through a mask pattern defined by the plurality of spacers.

2. The method of claim 1 , wherein the blanket deposition comprises a chemical vapor deposition.

3. The method of claim 1 , wherein the blanket deposition comprises an atomic layer deposition.

4. The method of claim 1 , wherein converting some of the temporary material comprises reacting a portion of the layer comprising the solid phase reactant with the temporary material.

5. The method of claim 4 , further comprising preferentially removing an unreacted remainder of the layer.

6. The method of claim 1 , wherein the solid phase reactant comprises a metal and the other material comprises a metal silicide.

7. The method of claim 6 , wherein the metal is selected from the group consisting of tantalum, hafnium, and nickel.

8. The method of claim 1 , wherein selectively reacting sidewalls of the temporary placeholders comprises exposing the sidewalls to a gas phase reactant.

9. The method of claim 8 , wherein the gas phase reactant is selected from the group consisting of a nitrogen and an oxygen-containing species.

10. The method of claim 1 , wherein defining the pattern comprises performing photolithography.

11. The method of claim 10 , wherein defining the pattern comprises performing photolithography utilizing 193 nm or 248 nm wavelength light.

12. The method of claim 1 , wherein transferring the pattern comprises performing an anisotropic etch.

13. The method of claim 1 , wherein selectively removing unconverted temporary material comprises performing a wet etch.

14. The method of claim 1 , wherein the spacers extend in spaced, generally parallel relation to one another at least between first and second spaced planes extending perpendicular to the spacers.

15. The method of claim 1 , wherein the temporary placeholders comprise silicon.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2005
From: SANDHU, GURTEJ S.; PRALL, KIRK D.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 017241/0688 →
Continuity (1)
Related Publication 20070049030A1 · Mar 1, 2007